Dynamical analysis, hardware implementation, and image encryption application of new 4D discrete hyperchaotic maps based on parallel and cascade memristors
IF 2.2 3区 工程技术Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Fei Yu , Xuqi Wang , Rongyao Guo , Zhijie Ying , Shuo Cai , Jie Jin
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引用次数: 0
Abstract
In this paper, the construction of a series of 4D discrete hyperchaotic maps is achieved through employing parallel and cascade operations on discrete memristors (DMs). Initially, DMs are integrated in both parallel and cascade configurations to form parallel DMs and cascade DMs, respectively. Subsequently, the nonlinear terms derived from these parallel and cascade DMs are coupled into the sine map and logistic map, generating four 4D discrete hyperchaotic maps that exhibit diverse dynamical behaviors. The dynamical properties of the proposed maps are systematically investigated through the analysis of dynamical behaviors and the distribution of the first Lyapunov exponent (LE). The dynamical phenomena of the hyperchaotic maps are further elucidated by examining the initial-value-dependent LE spectrum, bifurcation diagrams, and the mean values of state variables. Notably, the observed dynamical phenomena encompass four types of rare hyperchaotic behaviors, discharge pattern transitions, and coexistence phenomena. Moreover, the spectral entropy complexity is calculated across various parameter planes, revealing a high degree of complexity in the proposed system. The hyperchaotic map is implemented on Field-Programmable Gate Array (FPGA) hardware implementation platform, demonstrating its practical feasibility. Furthermore, an efficient image encryption scheme is designed, and its robust security performance is validated through comprehensive security analyses.
期刊介绍:
Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics:
Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.