Varying Periods of In-Field Testing With Storage- and Counter-Based Logic Built-In Self-Test

Abstract

In-field testing is important for detecting defects that escaped manufacturing tests or occurred during the lifetime of a chip. When in-field testing is performed periodically, some of the test periods may be shorter than others. Short test periods should focus on the faults that are the most likely to occur with aging, whereas long test periods can apply a more comprehensive test set. This article studies this scenario in the context of a logic built-in self-test (LBIST) approach that partitions compressed tests into subvectors for on-chip storage, and combines subvectors into compressed tests on-chip using counters. This approach has low storage requirements, allows complete fault coverage to be achieved, and uses a moderate number of tests. The problem of applying a small number of tests during a short testing period is formulated as a static problem of rearranging the subvectors (with possible repetitions and modification) such that the first $n_{1}$ subvectors are sufficient for detecting a subset of faults $F_{1}$ , and $n_{1}$ is as small as possible. Experimental results for benchmark circuits in an academic environment demonstrate the number of tests and overall storage requirements.