Approx-T: Design Methodology for Approximate Multiplication Units via Taylor-Expansion

Abstract

Approximate computing is emerging as a promising approach to devising energy-efficient IoT systems by exploiting the inherent error-tolerant nature of various applications. In this article, we present Approx-T, to tackle several major challenges according to the prior state-of-the-art (SOTA) approximate multiplication units (AMUs)—lack of comprehensive optimization formulation, asymmetric error distribution, nonadjustable runtime precision, and exponentially growing area complexity when adding up error compensation levels. We innovatively conduct an in-depth study on approximate multiplier via Taylor-expansion to address these issues. 1) Incorporate the Taylor’s theorem into the design concept of approximate arithmetic multipliers. 2) Leverage the inherent symmetrical error distribution of Taylor series to conduct unbiased approximations. 3) Present a runtime configurable error compensation architecture with low-complexity arithmetic operations. We implemented both approximate unsigned and signed integer and floating multiplication arithmetic units and compared with the SOTA works. The experimental results demonstrate that Approx-T surpasses other designs in all metrics, encompassing precision, area utilization, and power consumption. Furthermore, when deployed on an embedded field programmable gate array platform to assess a spectrum of edge computing tasks, Approx-T showcases remarkable performance. Particularly in CNN applications, it achieves up to a $10.7\times $ enhancement in energy efficiency, while maintaining negligible impact on accuracy.