BDLUT: Blind image denoising with hardware-optimized look-up tables

IF 2.2 4区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Boyu Li, Zhilin Ai, Baizhou Jiang, Binxiao Huang, Jason Chun Lok Li, Jie Liu, Zhengyuan Tu, Guoyu Wang, Daihai Yu, Ngai Wong
{"title":"BDLUT: Blind image denoising with hardware-optimized look-up tables","authors":"Boyu Li,&nbsp;Zhilin Ai,&nbsp;Baizhou Jiang,&nbsp;Binxiao Huang,&nbsp;Jason Chun Lok Li,&nbsp;Jie Liu,&nbsp;Zhengyuan Tu,&nbsp;Guoyu Wang,&nbsp;Daihai Yu,&nbsp;Ngai Wong","doi":"10.1002/jsid.2075","DOIUrl":null,"url":null,"abstract":"<p>Denoising sensor-captured images on edge display devices remains challenging due to deep neural networks' (DNNs) high computational overhead and synthetic noise training limitations. This work proposes BDLUT(-D), a novel blind denoising method combining optimized lookup tables (LUTs) with hardware-centric design. While BDLUT describes the LUT-based network architecture, BDLUT-D represents BDLUT trained with a specialized noise degradation model. Designed for edge deployment, BDLUT(-D) eliminates neural processing units (NPUs) and functions as a standalone ASIC IP solution. Experimental results demonstrate BDLUT-D achieves up to 2.42 dB improvement over state-of-the-art LUT methods on mixed-noise-intensity benchmarks, requiring only 66 KB storage. FPGA implementation shows over 10\n<span></span><math>\n <mo>×</mo></math> reduction in logic resources, 75% less storage compared to DNN accelerators, while achieving 57% faster processing than traditional bilateral filtering methods. These optimizations enable practical integration into edge scenarios like low-cost webcam enhancement and real-time 4 K-to-4 K denoising without compromising resolution or latency. By enhancing silicon efficiency and removing external accelerator dependencies, BDLUT(-D) establishes a new standard for practical edge imaging denoising. Implementation is available at https://github.com/HKU-LiBoyu/BDLUT.</p>","PeriodicalId":49979,"journal":{"name":"Journal of the Society for Information Display","volume":"33 5","pages":"628-643"},"PeriodicalIF":2.2000,"publicationDate":"2025-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1002/jsid.2075","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of the Society for Information Display","FirstCategoryId":"5","ListUrlMain":"https://sid.onlinelibrary.wiley.com/doi/10.1002/jsid.2075","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

Abstract

Denoising sensor-captured images on edge display devices remains challenging due to deep neural networks' (DNNs) high computational overhead and synthetic noise training limitations. This work proposes BDLUT(-D), a novel blind denoising method combining optimized lookup tables (LUTs) with hardware-centric design. While BDLUT describes the LUT-based network architecture, BDLUT-D represents BDLUT trained with a specialized noise degradation model. Designed for edge deployment, BDLUT(-D) eliminates neural processing units (NPUs) and functions as a standalone ASIC IP solution. Experimental results demonstrate BDLUT-D achieves up to 2.42 dB improvement over state-of-the-art LUT methods on mixed-noise-intensity benchmarks, requiring only 66 KB storage. FPGA implementation shows over 10 × reduction in logic resources, 75% less storage compared to DNN accelerators, while achieving 57% faster processing than traditional bilateral filtering methods. These optimizations enable practical integration into edge scenarios like low-cost webcam enhancement and real-time 4 K-to-4 K denoising without compromising resolution or latency. By enhancing silicon efficiency and removing external accelerator dependencies, BDLUT(-D) establishes a new standard for practical edge imaging denoising. Implementation is available at https://github.com/HKU-LiBoyu/BDLUT.

Abstract Image

Abstract Image

Abstract Image

Abstract Image

bdlt:使用硬件优化的查找表进行盲图像去噪
由于深度神经网络(dnn)的高计算开销和合成噪声训练的限制,在边缘显示设备上对传感器捕获的图像进行降噪仍然具有挑战性。这项工作提出了bdlt (-D),一种结合优化查找表(lut)和以硬件为中心的设计的新型盲去噪方法。BDLUT描述的是基于lut的网络架构,而BDLUT- d表示的是经过专门噪声退化模型训练的BDLUT。bplut (-D)专为边缘部署而设计,消除了神经处理单元(npu),可作为独立的ASIC IP解决方案。实验结果表明,在混合噪声强度基准测试中,BDLUT-D比最先进的LUT方法提高了2.42 dB,只需要66 KB的存储空间。FPGA实现显示,与DNN加速器相比,逻辑资源减少了10倍以上,存储空间减少了75%,而处理速度比传统的双边滤波方法快57%。这些优化可以实际集成到边缘场景中,如低成本的网络摄像头增强和实时4k到4k去噪,而不会影响分辨率或延迟。通过提高硅效率和消除外部加速器依赖,bdlt (d)为实际边缘成像去噪建立了新的标准。具体实现请访问https://github.com/HKU-LiBoyu/BDLUT。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
Journal of the Society for Information Display
Journal of the Society for Information Display 工程技术-材料科学:综合
CiteScore
4.80
自引率
8.70%
发文量
98
审稿时长
3 months
期刊介绍: The Journal of the Society for Information Display publishes original works dealing with the theory and practice of information display. Coverage includes materials, devices and systems; the underlying chemistry, physics, physiology and psychology; measurement techniques, manufacturing technologies; and all aspects of the interaction between equipment and its users. Review articles are also published in all of these areas. Occasional special issues or sections consist of collections of papers on specific topical areas or collections of full length papers based in part on oral or poster presentations given at SID sponsored conferences.
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信