Hui Xu , Xinzhong Xiao , Wenxin Huang , Ruijun Ma , Fuxin Tang , Pan Qi , Ye Yuan , Huaguo Liang
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引用次数: 0
Abstract
Given that traditional lithography hotspot detection methods based on semi-supervised learning struggle to meet the detection accuracy requirements of advanced integrated circuit (IC) manufacturing. To address the above challenges, a semi-supervised detection method based on feature fusion and residual attention is proposed in this paper. The method employs two inception modules as the multi-scale feature fusion module (MFF). These modules work in parallel to combine features from different layout scales. A residual attention module (RA) based on the convolutional block attention module (CBAM) is introduced, and a new neck network called RANeck is constructed using the RA module. The model utilizes the original layout features by constructing a joint multi-task network for classification and clustering through RANeck. The introduction of CBAM allows the model to focus more on important feature channels, thereby achieving more precise information filtering during feature processing. Additionally, a weighted cross-entropy loss function dynamically adjusts weights during the training process based on the number of lithography hotspots and nonhotspots, mitigating data imbalance effects and reducing false alarms. This method effectively leverages a large number of unlabeled data for training, improving the accuracy of lithography hotspot detection in the case of insufficient labeled data. The experimental results show that compared with the existing semi-supervised lithography hotspot detection methods, the proposed method has improved accuracy, false alarm, F1 score, and overall detection simulation time using 10 %–50 % of training data on the ICCAD 2012 contest benchmarks by 3.48 %, 22.03 %,12.76 %, and 20.26 %, respectively.
期刊介绍:
Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics:
Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.