Yaopeng Zhao , Jiamao Hao , Pan Luo , Ang Li , Jingtao Luo , Dong Ren , Chong Wang , Kai Liu , Lei Yang , Haibing Wen , Jianyuan Wang , Cher Ming Tan
{"title":"Etching-free reverse blocking enhancement-mode AlGaN/GaN HEMTs with CuO MOS drain on the Si substrates","authors":"Yaopeng Zhao , Jiamao Hao , Pan Luo , Ang Li , Jingtao Luo , Dong Ren , Chong Wang , Kai Liu , Lei Yang , Haibing Wen , Jianyuan Wang , Cher Ming Tan","doi":"10.1016/j.micrna.2025.208258","DOIUrl":null,"url":null,"abstract":"<div><div>The CuO E-mode reverse blocking MOS drain HEMT (MD-HEMT) and the traditional enhancement-mode(E-mode)ohmic drain HEMT (OD-HEMT) are designed and fabricated on Si substrates, with almost the same threshold voltage of 0.41 V. The MD-HEMT without etching barrier layer achieved through CuO on the thin barrier layer structure has a turn-on voltage of 1.18 V. When <em>V</em><sub>DS</sub> is −100 V, the reverse leakage current of the device is 1.43 × 10<sup>−1</sup> mA/mm. The reverse blocking voltage of the device reaches −260 V. When the temperature rises from 25 °C to 150 °C, the on-resistance of the device increases from 10.72 Ω mm to 14.32 Ω mm, and the maximum output current with a gate voltage of 5 V is reduced by 32.78 % from 687.18 mA/mm to 461.94 mA/mm. At the same time, the reverse leakage current of the device will also increase and the reverse blocking voltage will decrease. However, the device maintains significant reverse blocking capability even at 150 °C. The threshold voltage calculation model for CuO thin barrier structure was proposed, which can calculate the p-type concentration in the CuO layer. The calculation model provides reference for the device applications.</div></div>","PeriodicalId":100923,"journal":{"name":"Micro and Nanostructures","volume":"207 ","pages":"Article 208258"},"PeriodicalIF":3.0000,"publicationDate":"2025-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Micro and Nanostructures","FirstCategoryId":"1085","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S2773012325001876","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"PHYSICS, CONDENSED MATTER","Score":null,"Total":0}
引用次数: 0
Abstract
The CuO E-mode reverse blocking MOS drain HEMT (MD-HEMT) and the traditional enhancement-mode(E-mode)ohmic drain HEMT (OD-HEMT) are designed and fabricated on Si substrates, with almost the same threshold voltage of 0.41 V. The MD-HEMT without etching barrier layer achieved through CuO on the thin barrier layer structure has a turn-on voltage of 1.18 V. When VDS is −100 V, the reverse leakage current of the device is 1.43 × 10−1 mA/mm. The reverse blocking voltage of the device reaches −260 V. When the temperature rises from 25 °C to 150 °C, the on-resistance of the device increases from 10.72 Ω mm to 14.32 Ω mm, and the maximum output current with a gate voltage of 5 V is reduced by 32.78 % from 687.18 mA/mm to 461.94 mA/mm. At the same time, the reverse leakage current of the device will also increase and the reverse blocking voltage will decrease. However, the device maintains significant reverse blocking capability even at 150 °C. The threshold voltage calculation model for CuO thin barrier structure was proposed, which can calculate the p-type concentration in the CuO layer. The calculation model provides reference for the device applications.