A Compact Power-on-Reset Circuit With Configurable Brown-Out Detection

IF 2.8 2区工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Transactions on Very Large Scale Integration (VLSI) Systems Pub Date : 2025-04-30 DOI:10.1109/TVLSI.2025.3561131

Yoochang Kim;Jun-Eun Park;Kwanseo Park;Young-Ha Hwang

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引用次数: 0

Abstract

A compact power-on-reset (POR) circuit with a configurable brown-out reset (BOR) function is presented. An integrated voltage reference (VR) circuit provides a constant bias voltage that facilitates voltage-triggered POR/BOR operation, reliably preventing POR signal generation when the ramping supply voltage (

${V} _{\text {DD}}$

) level is too low. Moreover, the proposed POR circuit features a fast, configurable POR/BOR operation owing to an inverter-based trip point detector (TPD), which triggers the reset signal with a programmable trip point. The prototype POR circuit achieves a POR level higher than 752 mV with a maximum POR delay of

$16.4~\mu $

s at a 0.8–1.2-V

${V} _{\text {DD}}$

, supporting a wide range of supply ramping time from

$1~\mu $

s to 1 s. In addition, the prototype detects brown-out events with a supply drop of 0.1–0.4 V, generating the BOR signal. Designed using a 28-nm CMOS process, the prototype has a compact active area of

$995.3~\mu $

m² and a quiescent current of 162–974 nA at a 1-V

${V} _{\text {DD}}$

查看原文本刊更多论文

一个紧凑的电源上电复位电路与可配置的停电检测

提出了一种具有可配置断电复位功能的紧凑型上电复位（POR）电路。集成的基准电压（VR）电路提供恒定的偏置电压，促进电压触发的POR/BOR操作，当斜坡电源电压（${V} _{\text {DD}}$）水平过低时可靠地防止POR信号的产生。此外，所提出的POR电路具有快速，可配置的POR/BOR操作，由于基于逆变器的跳闸点检测器（TPD），它触发复位信号与可编程的跳闸点。原型POR电路在0.8 - 1.2 V {V} _{\text {DD}}$下实现了高于752 mV的POR电平，最大POR延迟为16.4~\mu $ s，支持从$1~\mu $ s到1 s的宽范围供电斜坡时间。此外，该原型检测到电源下降0.1-0.4 V的断电事件，产生BOR信号。该样机采用28纳米CMOS工艺设计，有效面积为995.3~\mu $ m2，静态电流为162-974 nA，电压为1 V ${V} _{\text {DD}}。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 工程技术-工程：电子与电气

CiteScore

6.40

自引率

7.10%

发文量

187

审稿时长

3.6 months

期刊介绍： The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.