A background calibration technique for SAR ADCs with split capacitor array

IF 1.9 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Microelectronics Journal Pub Date : 2025-06-06 DOI:10.1016/j.mejo.2025.106766

Jiacong Wang , Biyun Du , Zhangjie Su , Hongjian Ren , Wenya Luo , Chengchen Song , Chao Cao , Shubin Liu , Haijun Guo

引用次数: 0

Abstract

In this paper, a split capacitor array with different reference voltage and unit capacitor across two segments is presented. To enhance linearity, an integer bridge capacitor with reduced mismatch is utilized along with a dummy capacitor grounded for parasitic compensation. This scheme provides more design choices for the segmented capacitor array in the trade-off of various parameters. In addition, a novel digital background calibration method based on the GAS LMS algorithm is proposed for split-based ADC calibration. Compared with the traditional fixed step-size LMS algorithm, the proposed algorithm uses variable step-size and the hardware overhead is within an acceptable range. In the MATLAB simulation of a 16-bit SAR ADC, the results indicate that the proposed algorithm achieves 20 times faster parameter convergence speed and achieves higher accuracy.

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分体电容阵列SAR adc的背景标定技术

本文提出了一种具有不同参考电压和跨两段单位电容的分体式电容阵列。为了提高线性度，采用了一个减少失配的整数桥式电容器和一个接地的假电容器进行寄生补偿。该方案为分段电容阵列在各种参数的权衡中提供了更多的设计选择。此外，提出了一种新的基于GAS LMS算法的数字背景校准方法，用于基于分路的ADC校准。与传统的固定步长LMS算法相比，该算法采用可变步长，硬件开销在可接受的范围内。在一个16位SAR ADC的MATLAB仿真中，结果表明，该算法的参数收敛速度提高了20倍，精度更高。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Microelectronics Journal 工程技术-工程：电子与电气

CiteScore

4.00

自引率

27.30%

发文量

222

审稿时长

43 days

期刊介绍： Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.