{"title":"A 16.6-to-34.1 GHz Dual-Core Quad-Mode Oscillator Achieving 202.3 dBc/Hz FoMT in 65nm CMOS","authors":"Xin Yu;Xiaolong Liu","doi":"10.1109/LMWT.2025.3556280","DOIUrl":null,"url":null,"abstract":"This work presents a millimeter-wave (mm-wave) dual-core quad-mode oscillator incorporating a switch-less tertiary loop to extend the frequency tuning range (FTR) without introducing additional switch loss or parasitic. The design couples two identical transformer-based dual-band (low- and high-frequency) voltage-controlled oscillators (VCOs), which are configurable in either even or odd modes via mode switches. In the high- and low-frequency band, the switch-less tertiary loop functions as an open circuit in the even mode and a short circuit in the odd mode, enabling four distinct frequency modes. Fabricated in a 65-nm CMOS process, the proposed oscillator achieves an FTR from 16.6 to 34.1 GHz, with phase noise ranging from −122.4 to −130.0 dBc/Hz at a 10-MHz offset, while consuming 9.5–11mW of power. This results in a peak FoM of 185.5 dBc/Hz and FoM<sub>T</sub> of 202.3 dBc/Hz.","PeriodicalId":73297,"journal":{"name":"IEEE microwave and wireless technology letters","volume":"35 6","pages":"694-697"},"PeriodicalIF":3.4000,"publicationDate":"2025-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE microwave and wireless technology letters","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10963679/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"0","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
This work presents a millimeter-wave (mm-wave) dual-core quad-mode oscillator incorporating a switch-less tertiary loop to extend the frequency tuning range (FTR) without introducing additional switch loss or parasitic. The design couples two identical transformer-based dual-band (low- and high-frequency) voltage-controlled oscillators (VCOs), which are configurable in either even or odd modes via mode switches. In the high- and low-frequency band, the switch-less tertiary loop functions as an open circuit in the even mode and a short circuit in the odd mode, enabling four distinct frequency modes. Fabricated in a 65-nm CMOS process, the proposed oscillator achieves an FTR from 16.6 to 34.1 GHz, with phase noise ranging from −122.4 to −130.0 dBc/Hz at a 10-MHz offset, while consuming 9.5–11mW of power. This results in a peak FoM of 185.5 dBc/Hz and FoMT of 202.3 dBc/Hz.