{"title":"An electronically controllable floating capacitor multiplier for low frequency applications","authors":"Burak Sakacı, Deniz Özenli","doi":"10.1016/j.vlsi.2025.102458","DOIUrl":null,"url":null,"abstract":"<div><div>In this study, a floating capacitor multiplier structure without any passive resistor, created using a subtractor and a multiple-output current differencing transconductance amplifier (MO-CDTA), is extensively analyzed. In this respect, the characteristic equations, operating principles, and filter applications of the structure examined are provided. For the floating capacitor multiplier structure, multiplication factor ‘k’ varies between 400 and 1200 depending on the <span><math><mrow><msub><mi>V</mi><mtext>GS</mtext></msub></mrow></math></span> voltage. Besides the tunability feature, another striking aspect of this work is the applied of three different filter structures due to the floating configuration. The cut-off frequency of the low-pass filter created with the floating capacitor multiplier ranges from 12.5 kHz to 32.6 kHz. Another application, the high-pass filter, has a cut-off frequency ranging from 58.4 kHz to 207.3 kHz. In the final band-pass filter structure applied in this study, it is demonstrated that the center frequency of filter ranging from 15.5 kHz to 33.5 kHz is suitable for low frequency operations due to the structure's tunable feature. In addition to filter applications, post-layout details including temperature, Monte Carlo, and total harmonic distortion analysis of the proposed capacitor multiplier are provided alongside the experimental results.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"104 ","pages":"Article 102458"},"PeriodicalIF":2.5000,"publicationDate":"2025-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Integration-The Vlsi Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0167926025001154","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
In this study, a floating capacitor multiplier structure without any passive resistor, created using a subtractor and a multiple-output current differencing transconductance amplifier (MO-CDTA), is extensively analyzed. In this respect, the characteristic equations, operating principles, and filter applications of the structure examined are provided. For the floating capacitor multiplier structure, multiplication factor ‘k’ varies between 400 and 1200 depending on the voltage. Besides the tunability feature, another striking aspect of this work is the applied of three different filter structures due to the floating configuration. The cut-off frequency of the low-pass filter created with the floating capacitor multiplier ranges from 12.5 kHz to 32.6 kHz. Another application, the high-pass filter, has a cut-off frequency ranging from 58.4 kHz to 207.3 kHz. In the final band-pass filter structure applied in this study, it is demonstrated that the center frequency of filter ranging from 15.5 kHz to 33.5 kHz is suitable for low frequency operations due to the structure's tunable feature. In addition to filter applications, post-layout details including temperature, Monte Carlo, and total harmonic distortion analysis of the proposed capacitor multiplier are provided alongside the experimental results.
期刊介绍:
Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics:
Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.