{"title":"Side-channel attack resilient implementation of homomorphic encryption using elliptic curve cryptography for secure cloud computing","authors":"Parthasarathy R., Saravanan P.","doi":"10.1016/j.vlsi.2025.102439","DOIUrl":null,"url":null,"abstract":"<div><div>In recent times, the amount of data exchanged between the cloud storage and the users has proliferated. The security of that data is also critical. To secure that data and to enhance its integrity, it should be encrypted before being uploaded into the cloud. In this work, a side-channel attack-secured additive homomorphic encryption is implemented using elliptic curve cryptography on an FPGA platform. An elliptic curve scalar multiplication, which is the critical component of elliptic curve cryptography, is designed in the general prime field using standard projective coordinate representation and implemented for 192, 224, and 256 bits as per the left-to-right double-and-add algorithm using radix-4 Booth-encoded modular multipliers in both FPGA devices and the ASIC platform. A minimum of 8242 slices is required to implement the proposed 256-bit elliptic curve scalar multiplication in the Virtex-6 FPGA device. The area of the proposed 192, 224, and 256-bit elliptic curve scalar multiplication is estimated as 149.225K, 208.178K, and 266.981 KGE in the ASIC using Cadence gpdk-45 nm technology libraries. A correlation power analysis attack is mounted on the FPGA implementation of the proposed elliptic curve scalar multiplication with an 8-bit data size to determine the value of scalar ‘n’. The attack is successful with a minimum of 2301 traces, and a high correlation coefficient value is obtained. Scalar randomization is proposed and integrated with the design as a countermeasure part to thwart the correlation power analysis attack, which is successful, and hence the left-to-right double-and-add algorithm used to determine elliptic curve scalar multiplication is made secure against side-channel attacks. This secured hardware implementation of elliptic curve cryptography is utilized to encrypt the data uploaded to the cloud, where additive homomorphic encryption is employed to process the data. Hence, additive homomorphic encryption becomes side-channel attack resilient, and cloud computations are secured.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"104 ","pages":"Article 102439"},"PeriodicalIF":2.5000,"publicationDate":"2025-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Integration-The Vlsi Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0167926025000963","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
In recent times, the amount of data exchanged between the cloud storage and the users has proliferated. The security of that data is also critical. To secure that data and to enhance its integrity, it should be encrypted before being uploaded into the cloud. In this work, a side-channel attack-secured additive homomorphic encryption is implemented using elliptic curve cryptography on an FPGA platform. An elliptic curve scalar multiplication, which is the critical component of elliptic curve cryptography, is designed in the general prime field using standard projective coordinate representation and implemented for 192, 224, and 256 bits as per the left-to-right double-and-add algorithm using radix-4 Booth-encoded modular multipliers in both FPGA devices and the ASIC platform. A minimum of 8242 slices is required to implement the proposed 256-bit elliptic curve scalar multiplication in the Virtex-6 FPGA device. The area of the proposed 192, 224, and 256-bit elliptic curve scalar multiplication is estimated as 149.225K, 208.178K, and 266.981 KGE in the ASIC using Cadence gpdk-45 nm technology libraries. A correlation power analysis attack is mounted on the FPGA implementation of the proposed elliptic curve scalar multiplication with an 8-bit data size to determine the value of scalar ‘n’. The attack is successful with a minimum of 2301 traces, and a high correlation coefficient value is obtained. Scalar randomization is proposed and integrated with the design as a countermeasure part to thwart the correlation power analysis attack, which is successful, and hence the left-to-right double-and-add algorithm used to determine elliptic curve scalar multiplication is made secure against side-channel attacks. This secured hardware implementation of elliptic curve cryptography is utilized to encrypt the data uploaded to the cloud, where additive homomorphic encryption is employed to process the data. Hence, additive homomorphic encryption becomes side-channel attack resilient, and cloud computations are secured.
期刊介绍:
Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics:
Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.