Flexible fabrication of aligned multi-nanowire circuits for on-chip prototyping

Abstract

Circuits of multiple deterministically positioned semiconductor nanowires (NWs) is the basis of many devices for photonic, quantum, or conventional transistor applications. To explore and iterate on the design of larger circuits, the means to quickly place and electrically evaluate NWs at target locations must be developed. We propose and demonstrate a multi-NW circuit building concept on SiO₂/Si substrates, which enables us to quickly position and orient NW components into pre-designed configurations. Micro-manipulator probes are used to guide the NWs into reactive ion etched trenches, with desired designs, before contact metallization. The positioning works over a wide combination of trench widths and depths. Positioning accuracies are contingent on EBL patterning, precise up to ±10 nm. To demonstrate the concept, we create circuits of InP and InAs NWs with a wide variety of specific orientations. The concept was used to iterate a procedure for creating optimal contacts for InP NW photodiodes. Subsequently, we could fabricate and electrically probe 54 fully operational nano-photodiodes placed on three different samples, from which considerable statistics of diode performance could be obtained. Fabrication steps are directly compatible with conventional Si CMOS architecture and should function for a wide range of NW types. The accuracy and rate of placement combined with high fabrication yields enables proof-of-concept prototyping of complex circuits.