A valley-sensed emulated peak current-mode controlled buck converter for dual-channel DDR memory systems

Abstract

This work presents a valley-sensed emulated peak current-mode controlled buck converter specifically optimized for high-performance double data rate synchronous dynamic random access memory (DDR SDRAM) applications. In this work, a dual-channel synchronous buck converter is designed to provide a low voltage required for DDR applications. Building upon traditional emulated peak current-mode control, an innovative circuit structure with configurable pre-bias current sensing is introduced. This enhancement ensures that current sensing components are protected from high voltage stress and prevents sub-harmonic oscillations in the current sensing circuit. More importantly, it enables bidirectional switching of source and sink currents, which is essential for DDR power supply solutions. Experimental verification and testing results demonstrate that the dual-channel buck converter has an input voltage range of 3.3 V to 15 V, with a maximum output sourcing current of 6 A and a peak sinking current of 3 A. The chip is fabricated using 180 nm Bipolar-CMOS-DMOS (BCD) process technology, featuring a minimum turn-on time of 132 ns, a minimum turn-off time of 400 ns, and an operating frequency of 300 kHz. The overall chip dimensions are 2.2 mm $\times$ 3.1 mm, while the core area, excluding pads, measures 1.8 mm $\times$ 2.7 mm.