Minimal Counters, Maximum Insight: Simplifying System Performance With HPC Clusters for Optimized Monitoring

IF 1.4 3区计算机科学 Q4 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Computer Architecture Letters Pub Date : 2025-03-14 DOI:10.1109/LCA.2025.3570157

Shubhi Shukla;Abhijeet Singh;Rajdeep Chakraborty;Anirban Chakraborty;Tejas Rathod;Harshal Mumbaikar;Manoj Kumar Munigala;Madhusudhan K N;Pabitra Mitra;Debdeep Mukhopadhyay

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引用次数: 0

Abstract

As computer systems become more complex, evaluating performance requires tracking various hardware performance counters that capture the system’s internal activities. While these counters provide valuable insights, their growing number makes it challenging to identify the most relevant ones for performance analysis. In this paper, we investigate the correlation between performance counter values and overall system performance, while also exploring the inter-correlation between different counters. Our findings demonstrate that specific counters are strongly correlated with key performance metrics and that significant redundancy exists among counters. By leveraging these relationships, we propose a method for selecting a small, representative set of performance counters. This streamlined set can further be used to accurately predict performance score across various workloads and system configurations.

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最小的计数器，最大的洞察力：简化系统性能与高性能计算集群优化监控

随着计算机系统变得越来越复杂，评估性能需要跟踪捕捉系统内部活动的各种硬件性能计数器。虽然这些计数器提供了有价值的见解，但它们的数量不断增加，使得确定与性能分析最相关的计数器变得具有挑战性。在本文中，我们研究了性能计数器值与整体系统性能之间的相关性，同时也探索了不同计数器之间的相互关系。我们的研究结果表明，特定计数器与关键性能指标密切相关，并且计数器之间存在显着冗余。通过利用这些关系，我们提出了一种选择一个小的、有代表性的性能计数器集的方法。这个简化的集合可以进一步用于准确预测跨各种工作负载和系统配置的性能得分。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Computer Architecture Letters COMPUTER SCIENCE, HARDWARE & ARCHITECTURE-

CiteScore

4.60

自引率

4.30%

发文量

期刊介绍： IEEE Computer Architecture Letters is a rigorously peer-reviewed forum for publishing early, high-impact results in the areas of uni- and multiprocessor computer systems, computer architecture, microarchitecture, workload characterization, performance evaluation and simulation techniques, and power-aware computing. Submissions are welcomed on any topic in computer architecture, especially but not limited to: microprocessor and multiprocessor systems, microarchitecture and ILP processors, workload characterization, performance evaluation and simulation techniques, compiler-hardware and operating system-hardware interactions, interconnect architectures, memory and cache systems, power and thermal issues at the architecture level, I/O architectures and techniques, independent validation of previously published results, analysis of unsuccessful techniques, domain-specific processor architectures (e.g., embedded, graphics, network, etc.), real-time and high-availability architectures, reconfigurable systems.