{"title":"A high power supply rejection LDO with ripple neutralization technique for Sigma-Delta D/A converter","authors":"Xingyuan Tong, Zongxiang Liu, Yinbo Li, Xin Xin","doi":"10.1016/j.mejo.2025.106746","DOIUrl":null,"url":null,"abstract":"<div><div>A ripple neutralization technology is proposed to enhance the power supply rejection ratio (PSRR) of the low dropout regulator (LDO). By designing a bandgap reference in which the output ripple is in complementary phase with the power supply ripple, the output ripple of the bandgap reference passes through the LDO main loop and neutralizes the component of the power supply ripple transmitted to the LDO output. This reduces the impact of power supply ripple on the LDO output and enhances the PSRR of the LDO. An LDO with ripple neutralization technology is designed in the 180 nm Bipolar-CMOS-DMOS (BCD) process. In the frequency range of 0–100 kHz, the PSRR of the bandgap reference and the main loop of the LDO are −37.43 dB and −30.81 dB, respectively. With the proposed ripple neutralization technique, the PSRR of the LDO is improved from −30.81 dB to −73.17 dB without adding additional circuits, making it very suitable for application in high-precision data converters.</div></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":"162 ","pages":"Article 106746"},"PeriodicalIF":1.9000,"publicationDate":"2025-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S187923912500195X","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
A ripple neutralization technology is proposed to enhance the power supply rejection ratio (PSRR) of the low dropout regulator (LDO). By designing a bandgap reference in which the output ripple is in complementary phase with the power supply ripple, the output ripple of the bandgap reference passes through the LDO main loop and neutralizes the component of the power supply ripple transmitted to the LDO output. This reduces the impact of power supply ripple on the LDO output and enhances the PSRR of the LDO. An LDO with ripple neutralization technology is designed in the 180 nm Bipolar-CMOS-DMOS (BCD) process. In the frequency range of 0–100 kHz, the PSRR of the bandgap reference and the main loop of the LDO are −37.43 dB and −30.81 dB, respectively. With the proposed ripple neutralization technique, the PSRR of the LDO is improved from −30.81 dB to −73.17 dB without adding additional circuits, making it very suitable for application in high-precision data converters.
期刊介绍:
Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems.
The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc.
Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.