A 1 mW–10 W, Over 86.4% Efficiency Tri-Mode Buck Converter With Ripple-Based Control for Mobile Applications

IF 2.8 2区工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Transactions on Very Large Scale Integration (VLSI) Systems Pub Date : 2025-02-25 DOI:10.1109/TVLSI.2025.3542096

Shuyu Zhang;Menglian Zhao;Shuang Song

{"title":"A 1 mW–10 W, Over 86.4% Efficiency Tri-Mode Buck Converter With Ripple-Based Control for Mobile Applications","authors":"Shuyu Zhang;Menglian Zhao;Shuang Song","doi":"10.1109/TVLSI.2025.3542096","DOIUrl":null,"url":null,"abstract":"To achieve high efficiency over wide load range for modern mobile applications, this brief proposes a ripple-based V2-controlled buck converter operating with pulsewidth modulation (PWM)/pulse-frequency modulation (PFM)/load-adaptive standby mode (LASM). On system level, a delay-based load-adaptive V<inline-formula> <tex-math>$_{\\text {ON}}$ </tex-math></inline-formula> generator is exploited in LASM at ultralight load. When the output ripple is kept below its maximum restriction, the switching loss of the converter is further minimized in LASM compared with prior operation modes, including PFM, pulse-skip modulation (PSM), multiple-sawtooth PWM (MSPWM), and deep green mode (DGM). On circuit level, a dynamic-biased dual-offset hysteresis comparator is proposed. Together with other blocks that can be disabled, the quiescent consumption of controller in LASM is reduced to only 14 <inline-formula> <tex-math>$\\mu $ </tex-math></inline-formula>W. Fabricated in a 130-nm BCD process, the proposed converter can provide a 1.8-V output with a power density of 4.11 W/mm2. It achieves a 93.2% peak efficiency, while the efficiency can be maintained above 86.4% in 1 mW–10 W (<inline-formula> <tex-math>$\\times 10~000$ </tex-math></inline-formula>) load range.","PeriodicalId":13425,"journal":{"name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","volume":"33 6","pages":"1784-1788"},"PeriodicalIF":2.8000,"publicationDate":"2025-02-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10902517/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}

引用次数: 0

Abstract

To achieve high efficiency over wide load range for modern mobile applications, this brief proposes a ripple-based V2-controlled buck converter operating with pulsewidth modulation (PWM)/pulse-frequency modulation (PFM)/load-adaptive standby mode (LASM). On system level, a delay-based load-adaptive V

$_{\text {ON}}$

generator is exploited in LASM at ultralight load. When the output ripple is kept below its maximum restriction, the switching loss of the converter is further minimized in LASM compared with prior operation modes, including PFM, pulse-skip modulation (PSM), multiple-sawtooth PWM (MSPWM), and deep green mode (DGM). On circuit level, a dynamic-biased dual-offset hysteresis comparator is proposed. Together with other blocks that can be disabled, the quiescent consumption of controller in LASM is reduced to only 14

$\mu $

W. Fabricated in a 130-nm BCD process, the proposed converter can provide a 1.8-V output with a power density of 4.11 W/mm2. It achieves a 93.2% peak efficiency, while the efficiency can be maintained above 86.4% in 1 mW–10 W (

$\times 10~000$

) load range.

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1 mW-10 W，效率超过86.4%的三模降压变换器，基于纹波控制，适用于移动应用

为了在现代移动应用的宽负载范围内实现高效率，本简报提出了一种基于纹波的v2控制降压转换器，其工作方式为脉宽调制(PWM)/脉频调制(PFM)/负载自适应待机模式（LASM）。在系统层面上，采用了一种基于延迟的负载自适应V $_{\text {On}}$生成器，实现了超轻负载下的LASM。当输出纹波低于其最大限制时，与PFM、脉冲跳变调制（PSM）、多锯齿PWM （MSPWM）和深绿色模式（DGM）等工作模式相比，LASM变换器的开关损耗进一步降低。在电路层面，提出了一种动态偏置双偏置迟滞比较器。与其他可禁用的模块一起，LASM中控制器的静态功耗降至仅14 $\mu $ W.采用130 nm BCD工艺制造，所提出的转换器可提供1.8 v输出，功率密度为4.11 W/mm2。峰值效率达到93.2%，在1 mW-10 W （$\ × 10~000$）负载范围内效率可保持在86.4%以上。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 工程技术-工程：电子与电气

CiteScore

6.40

自引率

7.10%

发文量

187

审稿时长

3.6 months

期刊介绍： The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.