Flex-PE: Flexible and SIMD Multiprecision Processing Element for AI Workloads

IF 2.8 2区 工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Mukul Lokhande;Gopal Raut;Santosh Kumar Vishvakarma
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引用次数: 0

Abstract

The rapid evolution of artificial intelligence (AI) models, from deep neural networks (DNNs) to transformers/large-language models (LLMs), demands flexible hardware solutions to meet diverse execution needs across edge and cloud platforms. Existing accelerators lack unified support for multiprecision arithmetic and runtime-configurable activation functions (AFs). This work proposes Flex-PE, a single instruction, multiple data (SIMD)-enabled multiprecision processing element that efficiently integrates multiply-and-accumulate operations with configurable AFs using unified hardware, including Sigmoid, Tanh, ReLU, and SoftMax. The proposed design achieves throughput improvements of up to $16\times $ FxP4, $8\times $ FxP8, $4\times $ FxP16, and $1\times $ FxP32, with maximum hardware efficiency for both iterative and pipelined architectures. An area-efficient iterative Flex-PE-based SIMD systolic array reduces DMA reads by up to $62\times $ and $371\times $ for input feature maps and weight filters in VGG-16, achieving 8.42 GOPS/W energy efficiency with minimal accuracy loss (<2%). Flex-PE scales from 4-bit edge inference to FxP8/16/32, supporting edge and cloud high-performance computing (HPC) while providing high-performance adaptable AI hardware with optimal precision, throughput, and energy efficiency.
Flex-PE:用于人工智能工作负载的灵活和SIMD多精度处理元件
人工智能(AI)模型的快速发展,从深度神经网络(dnn)到变压器/大语言模型(llm),需要灵活的硬件解决方案来满足边缘和云平台的不同执行需求。现有的加速器缺乏对多精度算法和运行时可配置激活函数(AFs)的统一支持。这项工作提出了Flex-PE,这是一种支持单指令多数据(SIMD)的多精度处理元件,它使用统一的硬件(包括Sigmoid, Tanh, ReLU和SoftMax)有效地将乘法和累积操作与可配置的af集成在一起。所提出的设计实现了吞吐量提高高达$16\倍$ FxP4, $8\倍$ FxP8, $4\倍$ FxP16和$1\倍$ FxP32,在迭代和流水线架构中都具有最大的硬件效率。在vmg -16中,基于flex - pe的面积高效迭代SIMD收缩阵列可将输入特征映射和权重滤波器的DMA读取减少高达62倍和371倍,以最小的精度损失(<2%)实现8.42 GOPS/W的能量效率。Flex-PE可从4位边缘推断扩展到FxP8/16/32,支持边缘和云高性能计算(HPC),同时提供具有最佳精度、吞吐量和能效的高性能自适应AI硬件。
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来源期刊
CiteScore
6.40
自引率
7.10%
发文量
187
审稿时长
3.6 months
期刊介绍: The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.
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