Information Leakage Through Physical Layer Supply Voltage Coupling Vulnerability

IF 3.1 2区 工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Sahan Sanjaya;Aruna Jayasena;Prabhat Mishra
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Abstract

Power side-channel attacks are widely known for extracting information from data processed within a device while assuming that an attacker has physical access or the ability to modify the device. In this article, we introduce a novel side-channel vulnerability that leaks data-dependent power variations through physical layer supply voltage coupling (PSVC). Unlike traditional power side-channel attacks, the proposed vulnerability allows an adversary to mount an attack and extract information without modifying the device. In addition, unlike existing power-based remote attacks on field-programmable gate arrays (FPGAs), the PSVC vulnerability applies to both on-chip and on-board attacks. We assess the effectiveness of the PSVC vulnerability through three case studies, demonstrating several end-to-end attacks on general-purpose microcontrollers with varying adversary capabilities. These case studies provide evidence for the existence of the PSVC vulnerability, its applicability to on-chip as well as on-board side-channel attacks, and how it can eliminate the need for physical access to the target device, making it applicable to any off-the-shelf hardware. Our experiments also reveal that designing devices to operate at the lowest operational voltage significantly reduces the risk of PSVC side-channel vulnerability.
通过物理层电源电压耦合漏洞泄露信息
功率侧信道攻击被广泛认为是从设备内处理的数据中提取信息,同时假设攻击者具有物理访问或修改设备的能力。在本文中,我们介绍了一种新的侧信道漏洞,该漏洞通过物理层电源电压耦合(PSVC)泄露与数据相关的功率变化。与传统的功率侧信道攻击不同,该漏洞允许攻击者在不修改设备的情况下进行攻击并提取信息。此外,与现有针对现场可编程门阵列(fpga)的基于电源的远程攻击不同,PSVC漏洞既适用于片上攻击,也适用于板上攻击。我们通过三个案例研究评估了PSVC漏洞的有效性,展示了对具有不同对手能力的通用微控制器的几种端到端攻击。这些案例研究提供了PSVC漏洞存在的证据,它对片上和板上侧信道攻击的适用性,以及它如何消除对目标设备的物理访问的需要,使其适用于任何现成的硬件。我们的实验还表明,设计在最低工作电压下工作的器件可显著降低PSVC侧通道脆弱性的风险。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
CiteScore
6.40
自引率
7.10%
发文量
187
审稿时长
3.6 months
期刊介绍: The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.
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