Less Traces Are All It Takes: Efficient Side-Channel Analysis on AES

IF 2.9 3区 计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Zhiyuan Xiao;Chen Wang;Jian Shen;Q. M. Jonathan Wu;Debiao He
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Abstract

In cryptography, side-channel analysis (SCA) is a technique used to recover cryptographic keys by examining the physical leakages that occur during the operation of cryptographic devices. Recent advancements in deep learning (DL) have greatly enhanced the extraction of crucial information from intricate leakage patterns. A considerable amount of research is dedicated to studying the SubByte (SB) operations of the advanced encryption standard (AES). This is because the SB process, which generates numerous transitions between 0s and 1s during encryption, results in significant energy leakage. However, traditional analysis models primarily focus on the initial round of SB operations in AES, which are less effective on mobile terminals where it is difficult to collect enough signals. These models often neglect additional operations and subsequent rounds, thus providing limited insights from small datasets. Consequently, this limitation has a direct impact on the accuracy and efficiency of key recovery. Our study uses $\rho $ -test analysis to show that significant leakage occurs not only during the S-box operation but also during the AddRoundKey (AR) phase of AES. To address these challenges, we propose a new SCA method, that is, optimized for small sample sizes. This method includes a new comprehensive round trace labeling algorithm, which simultaneously analyzes the SB and AR stages of each AES round. Additionally, we introduce the peak precise localization algorithm to accurately identify the points of energy leakage during each encryption round. Our experiments, conducted with power and electromagnetic (EM) datasets from the STM32F303 microcontroller, demonstrate that our method can reliably recover keys with as few as 20 traces. These results highlight the enhanced capability of our method in handling the complexities of small sample datasets in cryptographic analysis.
更少的走线是所有它需要:有效的侧信道分析AES
在密码学中,侧信道分析(SCA)是一种用于通过检查加密设备操作期间发生的物理泄漏来恢复加密密钥的技术。深度学习(DL)的最新进展极大地增强了从复杂的泄漏模式中提取关键信息的能力。大量的研究致力于研究高级加密标准(AES)的子字节(SB)操作。这是因为SB过程在加密过程中产生大量0和1之间的转换,导致大量的能量泄漏。然而,传统的分析模型主要集中在AES的初始轮SB操作上,这在难以收集足够信号的移动终端上效果较差。这些模型通常忽略了额外的操作和后续的回合,因此从小数据集提供的见解有限。因此,这一限制直接影响到密钥恢复的准确性和效率。我们的研究使用$\rho $ -测试分析表明,不仅在S-box操作期间,而且在AES的AddRoundKey (AR)阶段也会发生重大泄漏。为了应对这些挑战,我们提出了一种新的SCA方法,即针对小样本量进行了优化。该方法包括一种新的综合轮迹标记算法,该算法同时分析每个AES轮的SB和AR阶段。此外,我们引入峰值精确定位算法,以准确识别每轮加密过程中的能量泄漏点。我们使用来自STM32F303微控制器的电源和电磁(EM)数据集进行的实验表明,我们的方法可以可靠地恢复密钥,只需20个走线。这些结果突出了我们的方法在处理密码分析中小样本数据集的复杂性方面的增强能力。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
CiteScore
5.60
自引率
13.80%
发文量
500
审稿时长
7 months
期刊介绍: The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components. The aids include methods, models, algorithms, and man-machine interfaces for system-level, physical and logical design including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, hardware-software co-design and documentation of integrated circuit and system designs of all complexities. Design tools and techniques for evaluating and designing integrated circuits and systems for metrics such as performance, power, reliability, testability, and security are a focus.
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