Nonintrusive Data-Driven Model Order Reduction for Circuits Based on Hammerstein Architectures

Abstract

We demonstrate that system identification techniques can provide a basis for effective, nonintrusive model order reduction (MOR) for common circuits that are key building blocks in microelectronics. Our approach is motivated by the practical operation of these circuits and utilizes a canonical Hammerstein architecture. To demonstrate the approach we develop parsimonious Hammerstein models for a nonlinear CMOS differential amplifier and an operational amplifier circuit. We train these models on a combination of direct current (DC) and transient SPICE circuit simulation data using a novel sequential strategy to identify their static nonlinear and linear dynamical parts. Simulation results show that the Hammerstein model is an effective surrogate for these types of circuits that accurately and efficiently reproduces their behavior over a wide range of operating points and input frequencies.