{"title":"Rapid Edge-Computing for Intelligent Fiber-Optic DAS","authors":"Yiyu Liu;Yongxin Wu;Xiben Jiao;Xingbin Li;Huijuan Wu;Jun Zhou;Zhen Xu;Xiao Yu","doi":"10.1109/JSEN.2025.3554221","DOIUrl":null,"url":null,"abstract":"Fiber-optic distributed acoustic sensors (DASs) are essential for monitoring urban infrastructure and predicting natural disasters using existing communication cables. As DAS instruments improve in spatial resolution and detection bandwidth, the data volume of large-scale sensing arrays increases, presenting challenges for real-time processing and the complexity of DAS algorithms. Traditional DAS systems, which rely on centralized host computer processing, face bottlenecks in real-time data transmission and handling due to the large data loads involved. To address this issue, a method utilizing rapid edge computation with field-programmable gate array (FPGA) technology is proposed for implementing DAS deep learning algorithms. Specifically, a customized, lightweight ResNet is introduced to enhance DAS signal recognition accuracy and computational efficiency. In addition, FPGA and DPU are leveraged to perform quantization processing and parallel optimization of the ResNet network, along with short-time Fourier transform (STFT) preprocessing. Test results show that on the FPGA platform ZCU-102, the average processing time per fiber sensing node is 0.398 ms. For a fiber length of 18.7 km with a spatial resolution of 10.32 m, the total processing time for 1812 nodes is 0.7212 s, significantly faster than the 6.288 s required by a desktop workstation (CPU: 13400; memory: 16 GB). This improvement in processing speed enables a high recognition accuracy of up to 97.37% on FPGA, only 0.81% lower than on CPU, while the FPGA’s maximum power consumption is merely 25 W, one-sixth of typical CPU consumption. This method provides a fast, accurate, and energy-efficient on-chip processing solution for various DAS-based safety monitoring applications, making it highly suitable for online remote distributed monitoring.","PeriodicalId":447,"journal":{"name":"IEEE Sensors Journal","volume":"25 10","pages":"17062-17071"},"PeriodicalIF":4.3000,"publicationDate":"2025-03-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Sensors Journal","FirstCategoryId":"103","ListUrlMain":"https://ieeexplore.ieee.org/document/10945953/","RegionNum":2,"RegionCategory":"综合性期刊","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
Fiber-optic distributed acoustic sensors (DASs) are essential for monitoring urban infrastructure and predicting natural disasters using existing communication cables. As DAS instruments improve in spatial resolution and detection bandwidth, the data volume of large-scale sensing arrays increases, presenting challenges for real-time processing and the complexity of DAS algorithms. Traditional DAS systems, which rely on centralized host computer processing, face bottlenecks in real-time data transmission and handling due to the large data loads involved. To address this issue, a method utilizing rapid edge computation with field-programmable gate array (FPGA) technology is proposed for implementing DAS deep learning algorithms. Specifically, a customized, lightweight ResNet is introduced to enhance DAS signal recognition accuracy and computational efficiency. In addition, FPGA and DPU are leveraged to perform quantization processing and parallel optimization of the ResNet network, along with short-time Fourier transform (STFT) preprocessing. Test results show that on the FPGA platform ZCU-102, the average processing time per fiber sensing node is 0.398 ms. For a fiber length of 18.7 km with a spatial resolution of 10.32 m, the total processing time for 1812 nodes is 0.7212 s, significantly faster than the 6.288 s required by a desktop workstation (CPU: 13400; memory: 16 GB). This improvement in processing speed enables a high recognition accuracy of up to 97.37% on FPGA, only 0.81% lower than on CPU, while the FPGA’s maximum power consumption is merely 25 W, one-sixth of typical CPU consumption. This method provides a fast, accurate, and energy-efficient on-chip processing solution for various DAS-based safety monitoring applications, making it highly suitable for online remote distributed monitoring.
期刊介绍:
The fields of interest of the IEEE Sensors Journal are the theory, design , fabrication, manufacturing and applications of devices for sensing and transducing physical, chemical and biological phenomena, with emphasis on the electronics and physics aspect of sensors and integrated sensors-actuators. IEEE Sensors Journal deals with the following:
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-Sensors in Industrial Practice