{"title":"Non-Uniform Voltage Balancing Methods for Series-Connected SiC MOSFETs in High-Frequency Fast Switching","authors":"Yixin Shi, Dingmeng Guo, Xiaoning Zhang, Yaogong Wang, Xiaoqin Ma, Rui Fan","doi":"10.1049/pel2.70046","DOIUrl":null,"url":null,"abstract":"<p>A half-bridge circuit formed by series-connected silicon carbide metal-oxide-semiconductor field-effect transistors (SiC MOSFETs) generates high-frequency, high-voltage pulses with a fast rising time, widely used in electro-optical modulators. Inconsistencies in the drive circuit timing, variations in device parameters, and parasitic parameters in drive circuit lead to non-uniform switching behaviour among the SiC MOSFETs, causing significant voltage stress disparities and potential overvoltage breakdown under severe conditions. The limitations of traditional passive balancing methods are addressed, where reduced switching speeds and increased losses are caused by identical balancing circuits. A novel non-uniform resistor-capacitor-diode (NRCD) voltage-balancing method is proposed for the load side. Considering the influence of parasitic parameters of the drive circuit, the optimal matching of circuit voltage balancing is realised by calculating the voltage balancing capacitance of each SiC MOSFET. Experimental results demonstrate that, compared to the traditional uniform method, the NRCD balancing method reduces the maximum deviation in drain-to-source voltages from 80.4 V to 2.0 V and the pulse rise time from 13.0 ns to 11.4 ns at an output of 3200 V, representing a 10.8% increase in speed. At 50 kHz, the largest switching loss for devices can be reduced from 5.857 W to 3.198 W, and the efficiency of switching losses can be improved by 45.4%.</p>","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7000,"publicationDate":"2025-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70046","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IET Power Electronics","FirstCategoryId":"5","ListUrlMain":"https://onlinelibrary.wiley.com/doi/10.1049/pel2.70046","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
A half-bridge circuit formed by series-connected silicon carbide metal-oxide-semiconductor field-effect transistors (SiC MOSFETs) generates high-frequency, high-voltage pulses with a fast rising time, widely used in electro-optical modulators. Inconsistencies in the drive circuit timing, variations in device parameters, and parasitic parameters in drive circuit lead to non-uniform switching behaviour among the SiC MOSFETs, causing significant voltage stress disparities and potential overvoltage breakdown under severe conditions. The limitations of traditional passive balancing methods are addressed, where reduced switching speeds and increased losses are caused by identical balancing circuits. A novel non-uniform resistor-capacitor-diode (NRCD) voltage-balancing method is proposed for the load side. Considering the influence of parasitic parameters of the drive circuit, the optimal matching of circuit voltage balancing is realised by calculating the voltage balancing capacitance of each SiC MOSFET. Experimental results demonstrate that, compared to the traditional uniform method, the NRCD balancing method reduces the maximum deviation in drain-to-source voltages from 80.4 V to 2.0 V and the pulse rise time from 13.0 ns to 11.4 ns at an output of 3200 V, representing a 10.8% increase in speed. At 50 kHz, the largest switching loss for devices can be reduced from 5.857 W to 3.198 W, and the efficiency of switching losses can be improved by 45.4%.
期刊介绍:
IET Power Electronics aims to attract original research papers, short communications, review articles and power electronics related educational studies. The scope covers applications and technologies in the field of power electronics with special focus on cost-effective, efficient, power dense, environmental friendly and robust solutions, which includes:
Applications:
Electric drives/generators, renewable energy, industrial and consumable applications (including lighting, welding, heating, sub-sea applications, drilling and others), medical and military apparatus, utility applications, transport and space application, energy harvesting, telecommunications, energy storage management systems, home appliances.
Technologies:
Circuits: all type of converter topologies for low and high power applications including but not limited to: inverter, rectifier, dc/dc converter, power supplies, UPS, ac/ac converter, resonant converter, high frequency converter, hybrid converter, multilevel converter, power factor correction circuits and other advanced topologies.
Components and Materials: switching devices and their control, inductors, sensors, transformers, capacitors, resistors, thermal management, filters, fuses and protection elements and other novel low-cost efficient components/materials.
Control: techniques for controlling, analysing, modelling and/or simulation of power electronics circuits and complete power electronics systems.
Design/Manufacturing/Testing: new multi-domain modelling, assembling and packaging technologies, advanced testing techniques.
Environmental Impact: Electromagnetic Interference (EMI) reduction techniques, Electromagnetic Compatibility (EMC), limiting acoustic noise and vibration, recycling techniques, use of non-rare material.
Education: teaching methods, programme and course design, use of technology in power electronics teaching, virtual laboratory and e-learning and fields within the scope of interest.
Special Issues. Current Call for papers:
Harmonic Mitigation Techniques and Grid Robustness in Power Electronic-Based Power Systems - https://digital-library.theiet.org/files/IET_PEL_CFP_HMTGRPEPS.pdf