{"title":"Emulation of versatile tunable universal mem-elements design and its application","authors":"Niranjan Raj , Anshul Awasthi , Sagar , Parvatam Deepthi , Surya Shankar Dan","doi":"10.1016/j.aeue.2025.155838","DOIUrl":null,"url":null,"abstract":"<div><div>This study proposes the use of an active building block Operational Transconductance Amplifier (OTA), three transconductor elements, and a few passive components to design an electronically tunable universal mem-elements emulator circuit that includes memristor (MR), memcapacitor (MC), and meminductor (MI). Mem element’s physical realization is still an open challenge that drives the creation of new designs. The universal circuit requires one floating resistor and two grounded capacitors as passive components. The topology of mem-elements has been implemented using a switch without altering the circuit structure. The workability of memristor and meminductor don’t require any resistor while memcapacitor requires the use of one resistor. The presented design establishes a simple mathematical relationship and verifies Memristive system fingerprint traits such as pinched hysteresis loop (PHL). The functionality of the suggested universal mem-elements architecture is confirmed by the PSpice simulation results for implementing all three characteristics in the 0.18 μm CMOS technology node. Implementation using commercial ICs further validates the circuit’s performance beyond its CMOS-based architecture. The functioning of the suggested architecture is demonstrated by application various examples. The MR, MC, and MI emulation circuits have been shown to consume 7.4 mW, 11.2 mW, and 10.4 mW of power, respectively</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"197 ","pages":"Article 155838"},"PeriodicalIF":3.0000,"publicationDate":"2025-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Aeu-International Journal of Electronics and Communications","FirstCategoryId":"94","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1434841125001797","RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
This study proposes the use of an active building block Operational Transconductance Amplifier (OTA), three transconductor elements, and a few passive components to design an electronically tunable universal mem-elements emulator circuit that includes memristor (MR), memcapacitor (MC), and meminductor (MI). Mem element’s physical realization is still an open challenge that drives the creation of new designs. The universal circuit requires one floating resistor and two grounded capacitors as passive components. The topology of mem-elements has been implemented using a switch without altering the circuit structure. The workability of memristor and meminductor don’t require any resistor while memcapacitor requires the use of one resistor. The presented design establishes a simple mathematical relationship and verifies Memristive system fingerprint traits such as pinched hysteresis loop (PHL). The functionality of the suggested universal mem-elements architecture is confirmed by the PSpice simulation results for implementing all three characteristics in the 0.18 μm CMOS technology node. Implementation using commercial ICs further validates the circuit’s performance beyond its CMOS-based architecture. The functioning of the suggested architecture is demonstrated by application various examples. The MR, MC, and MI emulation circuits have been shown to consume 7.4 mW, 11.2 mW, and 10.4 mW of power, respectively
期刊介绍:
AEÜ is an international scientific journal which publishes both original works and invited tutorials. The journal''s scope covers all aspects of theory and design of circuits, systems and devices for electronics, signal processing, and communication, including:
signal and system theory, digital signal processing
network theory and circuit design
information theory, communication theory and techniques, modulation, source and channel coding
switching theory and techniques, communication protocols
optical communications
microwave theory and techniques, radar, sonar
antennas, wave propagation
AEÜ publishes full papers and letters with very short turn around time but a high standard review process. Review cycles are typically finished within twelve weeks by application of modern electronic communication facilities.