Emulation of versatile tunable universal mem-elements design and its application

IF 3 3区 计算机科学 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Niranjan Raj , Anshul Awasthi , Sagar , Parvatam Deepthi , Surya Shankar Dan
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引用次数: 0

Abstract

This study proposes the use of an active building block Operational Transconductance Amplifier (OTA), three transconductor elements, and a few passive components to design an electronically tunable universal mem-elements emulator circuit that includes memristor (MR), memcapacitor (MC), and meminductor (MI). Mem element’s physical realization is still an open challenge that drives the creation of new designs. The universal circuit requires one floating resistor and two grounded capacitors as passive components. The topology of mem-elements has been implemented using a switch without altering the circuit structure. The workability of memristor and meminductor don’t require any resistor while memcapacitor requires the use of one resistor. The presented design establishes a simple mathematical relationship and verifies Memristive system fingerprint traits such as pinched hysteresis loop (PHL). The functionality of the suggested universal mem-elements architecture is confirmed by the PSpice simulation results for implementing all three characteristics in the 0.18 μm CMOS technology node. Implementation using commercial ICs further validates the circuit’s performance beyond its CMOS-based architecture. The functioning of the suggested architecture is demonstrated by application various examples. The MR, MC, and MI emulation circuits have been shown to consume 7.4 mW, 11.2 mW, and 10.4 mW of power, respectively
通用可调微元件设计仿真及其应用
本研究提出使用一个有源构件运算跨导放大器(OTA)、三个跨导元件和一些无源元件来设计一个电子可调谐的通用mems元件仿真电路,包括忆阻器(MR)、忆电容(MC)和忆电感器(MI)。Mem元素的物理实现仍然是一个开放的挑战,推动了新设计的创造。通用电路需要一个浮动电阻和两个接地电容器作为无源元件。在不改变电路结构的情况下,使用开关实现了mems元件的拓扑结构。记忆电阻器和记忆电感的可加工性不需要任何电阻,而记忆电容则需要使用一个电阻。本设计建立了一个简单的数学关系,并验证了忆阻系统的指纹特征,如捏滞回线(PHL)。在0.18 μm CMOS技术节点上实现所有三个特性的PSpice仿真结果证实了所建议的通用mems -elements架构的功能。使用商用ic的实现进一步验证了电路的性能超越其基于cmos的架构。通过应用实例说明了所建议的体系结构的功能。MR、MC和MI仿真电路的功耗分别为7.4 mW、11.2 mW和10.4 mW
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来源期刊
CiteScore
6.90
自引率
18.80%
发文量
292
审稿时长
4.9 months
期刊介绍: AEÜ is an international scientific journal which publishes both original works and invited tutorials. The journal''s scope covers all aspects of theory and design of circuits, systems and devices for electronics, signal processing, and communication, including: signal and system theory, digital signal processing network theory and circuit design information theory, communication theory and techniques, modulation, source and channel coding switching theory and techniques, communication protocols optical communications microwave theory and techniques, radar, sonar antennas, wave propagation AEÜ publishes full papers and letters with very short turn around time but a high standard review process. Review cycles are typically finished within twelve weeks by application of modern electronic communication facilities.
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