Bhawna Tiwari;Suyash Shrivastava;Vaishali Choudhary;Pydi Ganga Bahubalindruni
{"title":"Multi-Bit Capacitance Sensing System Using a-IGZO TFT Technology for Smart Wearables","authors":"Bhawna Tiwari;Suyash Shrivastava;Vaishali Choudhary;Pydi Ganga Bahubalindruni","doi":"10.1109/TCSII.2025.3549921","DOIUrl":null,"url":null,"abstract":"This brief presents a novel multi-bit Capacitance-to-Digital converter (CDC) using unipolar single-gate amorphous-Indium-Gallium-Zinc-Oxide thin-film transistors (a-IGZO TFTs). This circuit is fabricated on a <inline-formula> <tex-math>$30{\\mathrm {\\,}} \\mu $ </tex-math></inline-formula> m thick polyimide substrate with an active area of <inline-formula> <tex-math>$6.5{\\mathrm {\\,}}$ </tex-math></inline-formula> mm2. The proposed CDC is designed by employing Charge-Sharing Successive-Approximation Register Analog-to-Digital Converter (CS SAR ADC). Further, the design facilitates integration of capacitance sensor/array directly with the ADC, hence the additional interfacing circuits between the capacitive-sensor and the ADC can be eliminated to make the system compact and energy-efficient. The functionality of the proposed CDC is demonstrated for a sensor capacitance value ranging from <inline-formula> <tex-math>$1{\\mathrm {\\,}}$ </tex-math></inline-formula> pF to <inline-formula> <tex-math>$31{\\mathrm {\\,}}$ </tex-math></inline-formula> pF. From measurements it is observed that the minimum value of capacitance that can be detected with the proposed CDC is around <inline-formula> <tex-math>$2{\\mathrm {\\,}}$ </tex-math></inline-formula> pF, while the state-of-the-art CDC is around <inline-formula> <tex-math>$3.7{\\mathrm {\\,}}$ </tex-math></inline-formula> pF, which is reported on a truly flexible substrate. Further, the ADC deployed in the CDC has resulted in an SNR of <inline-formula> <tex-math>$35.57{\\mathrm {\\,}}$ </tex-math></inline-formula> dB, figure-of-merit (FoM) of <inline-formula> <tex-math>$19.9{\\mathrm {\\,}}$ </tex-math></inline-formula> nJ/c.s., ENOB of <inline-formula> <tex-math>$5.6{\\mathrm {\\,}}$ </tex-math></inline-formula> bits, differential non-linearity (DNL) of <inline-formula> <tex-math>$0.52{\\mathrm {\\,}}$ </tex-math></inline-formula> LSB and an integral non-linearity (INL) of <inline-formula> <tex-math>$0.81{\\mathrm {\\,}}$ </tex-math></inline-formula> LSB. At a sampling frequency of <inline-formula> <tex-math>$2.08{\\mathrm {\\,}}$ </tex-math></inline-formula> kHz, the ADC has shown a total power dissipation of <inline-formula> <tex-math>$2.02{\\mathrm {\\,}}$ </tex-math></inline-formula> mW with a supply voltage <inline-formula> <tex-math>$(V_{DD})$ </tex-math></inline-formula> of <inline-formula> <tex-math>$4{\\mathrm {\\,}}$ </tex-math></inline-formula> V. This capacitance sensing system finds potential applications in areas of biomedical, healthcare, and smart packaging systems etc, which need truly flexible devices.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 5","pages":"663-667"},"PeriodicalIF":4.0000,"publicationDate":"2025-03-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Circuits and Systems II: Express Briefs","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10919102/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
This brief presents a novel multi-bit Capacitance-to-Digital converter (CDC) using unipolar single-gate amorphous-Indium-Gallium-Zinc-Oxide thin-film transistors (a-IGZO TFTs). This circuit is fabricated on a $30{\mathrm {\,}} \mu $ m thick polyimide substrate with an active area of $6.5{\mathrm {\,}}$ mm2. The proposed CDC is designed by employing Charge-Sharing Successive-Approximation Register Analog-to-Digital Converter (CS SAR ADC). Further, the design facilitates integration of capacitance sensor/array directly with the ADC, hence the additional interfacing circuits between the capacitive-sensor and the ADC can be eliminated to make the system compact and energy-efficient. The functionality of the proposed CDC is demonstrated for a sensor capacitance value ranging from $1{\mathrm {\,}}$ pF to $31{\mathrm {\,}}$ pF. From measurements it is observed that the minimum value of capacitance that can be detected with the proposed CDC is around $2{\mathrm {\,}}$ pF, while the state-of-the-art CDC is around $3.7{\mathrm {\,}}$ pF, which is reported on a truly flexible substrate. Further, the ADC deployed in the CDC has resulted in an SNR of $35.57{\mathrm {\,}}$ dB, figure-of-merit (FoM) of $19.9{\mathrm {\,}}$ nJ/c.s., ENOB of $5.6{\mathrm {\,}}$ bits, differential non-linearity (DNL) of $0.52{\mathrm {\,}}$ LSB and an integral non-linearity (INL) of $0.81{\mathrm {\,}}$ LSB. At a sampling frequency of $2.08{\mathrm {\,}}$ kHz, the ADC has shown a total power dissipation of $2.02{\mathrm {\,}}$ mW with a supply voltage $(V_{DD})$ of $4{\mathrm {\,}}$ V. This capacitance sensing system finds potential applications in areas of biomedical, healthcare, and smart packaging systems etc, which need truly flexible devices.
期刊介绍:
TCAS II publishes brief papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes:
Circuits: Analog, Digital and Mixed Signal Circuits and Systems
Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic
Circuits and Systems, Power Electronics and Systems
Software for Analog-and-Logic Circuits and Systems
Control aspects of Circuits and Systems.