Offset-Tolerant Body-Biased Sense Amplifier With Rise-Time Control Technique for SRAM

Abstract

In this brief, we propose an Offset-Tolerant Body-biased sense amplifier (OTB-SA) with a rise-time $(T_{\mathrm { RISE}})$ control technique to address the sensing failure issue that occurs when the input voltage difference $({\Delta }V_{\mathrm { BL}})$ of a latch-type SA is smaller than the offset voltage $(V_{\mathrm { OS}})$ . The OTB-SA with $T_{\mathrm { RISE}}$ leverages body biasing and $T_{\mathrm { RISE}}$ control to enhance the differential signal injection (DSI) effect, thereby reducing both $V_{\mathrm { OS}}$ and energy consumption. Post-layout HSPICE simulation results using a 28 nm technology model indicate that, when target $V_{\mathrm { OS}}$ standard deviation $({\sigma }_{\mathrm { OS}})$ is 5 mV, the OTB-SA with $T_{\mathrm { RISE}}$ achieves a 49.6% reduction in area and a 60.1% decrease in energy consumption compared to a voltage-latched SA (VLSA) without $T_{\mathrm { RISE}}$ . Moreover, compared to previous SAs, the OTB-SA with $T_{\mathrm { RISE}}$ showed up to 69.1% area reduction and up to 91.2% energy consumption reduction. Measurements from a 28 nm test chip confirmed that $T_{\mathrm { RISE}}$ control is effective, showing a trend where ${\sigma }_{\mathrm { OS}}$ decreases as $T_{\mathrm { RISE}}$ increases for OTB-SA.