MBM PUF: A Multi-Bit Memory-Based Physical Unclonable Function

Abstract

This paper introduces multi-bit memory-based PUF (MBM PUF), a new PUF architecture designed to enhance the resilience of SRAM PUFs in ASIC applications. The MBM PUF utilizes an SRAM cell as its main component, capitalizing on its simplicity while mitigating weaknesses such as susceptibility to environmental noise and various attacks. As an example, a MBM PUF was implemented within an edge-triggered D flip-flop, a key component in the scan chain used by digital and mixed-signal designs, to achieve enhanced security with minimal area overhead. The concept can also be integrated into other circuits with built-in positive feedback loops, effectively leveraging their resources while minimizing die area. Simulation results in 45 nm CMOS technology show that the proposed security solution can readily fulfill the required performance criteria for a PUF.