Efficient Design and Implementation of Scale-Free CORDIC With Mutually Exclusive Micro-Rotations

Abstract

In this paper, a new approach to the design of a micro-rotation set for scale-free CORDIC is proposed. The sine and cosine functions of all the micro-rotation angles are realized by a simple shift or a shift-add operations which significantly reduces the hardware complexity. Besides, the micro-rotation set (except the first one) is designed to form mutually exclusive pairs. As a result of mutually exclusive micro-rotations, it is possible to reduce the required number of iterations to almost half for a given precision. Apart from that, the latency, as well as, the hardware complexity are also significantly reduced. A 9-bit fractional accuracy is obtained with just 5 iterations as against 13 iterations required by the conventional CORDIC. Suitable threshold angles are proposed to decide, using low-complexity comparators, whether a micro-rotation should be executed in a given iteration or can be skipped. The proposed circuits to determine the rotation conditions for different iterations involve either 2-bit or 3-bit comparators. The CORDIC circuit based on the proposed set of micro-rotations is shown to converge for any given angle of rotation. Furthermore, the proposed design involves significantly less logic, computation time, and latency than the best of the scale-free CORDIC circuits. When implemented on Xilinx FPGA (Field Programmable Gate Arrays), it requires 20% less area, offers higher operating frequency, and saves close to 19% power and 20% energy per computation over the latter.