A Picowatt CMOS Voltage Reference Using Independent TC and Output Level Calibrations

IF 2.8 2区工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Transactions on Very Large Scale Integration (VLSI) Systems Pub Date : 2024-12-04 DOI:10.1109/TVLSI.2024.3508259

Yuyang Li;Ryan Caginalp;Inhee Lee

引用次数: 0

Abstract

We propose a low-power voltage reference that enables independent adjustment of temperature sensitivity and output level. This design enhances the temperature sensitivity without impacting the output level distribution, in contrast to previous methods. The proposed circuit achieves this by integrating a separate control system that utilizes diode-connected pMOS transistors and an analog multiplexer for output level adjustment, along with biasing current control to improve the temperature sensitivity. In a 180-nm CMOS process, the prototype circuit generates a stable reference voltage averaging 192 mV, maintaining an accuracy of ±8.8 mV (

$\pm 3\sigma $

) from 0 °C to 75 °C across ten samples. In addition, it consumes only 35.8 pW at 0.6 V and 25 °C.

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使用独立TC和输出电平校准的皮瓦CMOS电压基准

我们提出了一种低功耗电压基准，可以独立调节温度灵敏度和输出电平。与以前的方法相比，该设计在不影响输出电平分布的情况下提高了温度灵敏度。该电路通过集成一个单独的控制系统来实现这一目标，该控制系统利用二极管连接的pMOS晶体管和模拟多路复用器进行输出电平调节，以及偏置电流控制以提高温度灵敏度。在180纳米CMOS工艺中，原型电路产生平均192 mV的稳定参考电压，在10个样品中从0°C到75°C保持±8.8 mV （$\pm 3\sigma $）的精度。此外，它在0.6 V和25°C时的功耗仅为35.8 pW。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 工程技术-工程：电子与电气

CiteScore

6.40

自引率

7.10%

发文量

187

审稿时长

3.6 months

期刊介绍： The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.