A Capacitorless Flipped-Voltage-Follower-Based Low-Dropout Regulator Incorporating Adaptive-Compensation Buffer

IF 2.8 2区工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Transactions on Very Large Scale Integration (VLSI) Systems Pub Date : 2025-02-04 DOI:10.1109/TVLSI.2025.3535630

Yee-Chyan Tan;Harikrishnan Ramiah;S. F. Wan Muhamad Hatta;Chee-Cheow Lim;Rui P. Martins;Pui-In Mak;Yong Chen

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引用次数: 0

Abstract

This brief presents an output-capacitorless low-dropout (OCL-LDO) regulator based on flipped-voltage-follower (FVF) and dual pMOS pass transistors. An adaptive-compensation buffer (ACB) dynamically regulates the operation of the pass transistors. Specifically, when the load current falls below 5 mA, only the smaller pass transistor is activated; otherwise, both pass transistors are engaged, thereby simultaneously mitigating the minimum load current requirement for FVF architecture and extending the load current ranging from 0 to 30 mA while maintaining stability without an external load capacitor. At 1.15-V supply voltage and 0-mA load current, the quiescent current is

$6~\mu $

A. The output voltage is 1.0 V with a dropout voltage of 0.15 V. Measurements show that with a load current stepping from 0 to 30 mA at an edge time of 100 ns, the output voltage undershoot is 0.2 V with a recovery time of 200 ns while achieving a load regulation of 0.23 mV/V. Our OCL-LDO is fabricated in a 180-nm CMOS with an active area of 0.031 mm2.

查看原文本刊更多论文

基于自适应补偿缓冲器的无电容倒转电压跟踪器低差稳压器

本文介绍了一种基于翻转电压跟随器（FVF）和双pMOS通管的无输出电容低差（OCL-LDO）稳压器。自适应补偿缓冲器（ACB）动态调节通路晶体管的工作。具体来说，当负载电流低于5ma时，只有较小的通管被激活；否则，两个通路晶体管都被接合，从而同时降低了FVF架构的最小负载电流要求，并将负载电流范围从0扩展到30 mA，同时保持稳定性，而无需外部负载电容器。在1.15 V电源电压和0 ma负载电流下，静态电流为$6~\mu $ a，输出电压为1.0 V，压降电压为0.15 V。测量结果表明，负载电流从0步进到30 mA，边缘时间为100 ns，输出电压欠冲为0.2 V，恢复时间为200 ns，同时实现了0.23 mV/V的负载调节。我们的OCL-LDO是在180nm CMOS中制造的，有源面积为0.031 mm2。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 工程技术-工程：电子与电气

CiteScore

6.40

自引率

7.10%

发文量

187

审稿时长

3.6 months

期刊介绍： The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.