Xuan Wang;Xiaomi Zhou;Shanshan Han;Ruicheng Dai;Xiaolong Shen;Menghui Xu;Leibin Ni;Wei Wu;Weikang Qian
{"title":"AccALS 2.0: Accelerating Approximate Logic Synthesis by Simultaneous Selection of Multiple Local Approximate Changes","authors":"Xuan Wang;Xiaomi Zhou;Shanshan Han;Ruicheng Dai;Xiaolong Shen;Menghui Xu;Leibin Ni;Wei Wu;Weikang Qian","doi":"10.1109/TCAD.2024.3506860","DOIUrl":null,"url":null,"abstract":"Approximate computing emerges as an energy-efficient computing paradigm designed for applications that can tolerate errors. Many iterative methods for approximate logic synthesis (ALS) have been developed to automatically synthesize approximate circuits. Nonetheless, most of them overlook the potential of applying multiple local approximate changes (LACs) simultaneously in one iteration, which can significantly reduce the overall computation time. In this article, we propose AccALS 2.0, a novel framework for further accelerating iterative ALS flows, which is based on simultaneous selection of multiple LACs in a single round. However, there are two challenges for selecting multiple LACs. The first is that the mutual influence of multiple LACs can affect the estimation of the circuit error. The second is that there may exist conflicts among multiple LACs. To address these issues, first, we propose an efficient measure for the mutual influence between two LACs. With its help, we transform the problems of solving the LAC conflicts and selecting multiple LACs into a unified maximum independent set problem for solving. The experimental results showed that AccALS 2.0 outperforms state-of-the-art ALS methods in runtime, while achieving similar or better-circuit quality.","PeriodicalId":13251,"journal":{"name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","volume":"44 5","pages":"1620-1633"},"PeriodicalIF":2.7000,"publicationDate":"2024-11-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","FirstCategoryId":"94","ListUrlMain":"https://ieeexplore.ieee.org/document/10767734/","RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
Approximate computing emerges as an energy-efficient computing paradigm designed for applications that can tolerate errors. Many iterative methods for approximate logic synthesis (ALS) have been developed to automatically synthesize approximate circuits. Nonetheless, most of them overlook the potential of applying multiple local approximate changes (LACs) simultaneously in one iteration, which can significantly reduce the overall computation time. In this article, we propose AccALS 2.0, a novel framework for further accelerating iterative ALS flows, which is based on simultaneous selection of multiple LACs in a single round. However, there are two challenges for selecting multiple LACs. The first is that the mutual influence of multiple LACs can affect the estimation of the circuit error. The second is that there may exist conflicts among multiple LACs. To address these issues, first, we propose an efficient measure for the mutual influence between two LACs. With its help, we transform the problems of solving the LAC conflicts and selecting multiple LACs into a unified maximum independent set problem for solving. The experimental results showed that AccALS 2.0 outperforms state-of-the-art ALS methods in runtime, while achieving similar or better-circuit quality.
期刊介绍:
The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components. The aids include methods, models, algorithms, and man-machine interfaces for system-level, physical and logical design including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, hardware-software co-design and documentation of integrated circuit and system designs of all complexities. Design tools and techniques for evaluating and designing integrated circuits and systems for metrics such as performance, power, reliability, testability, and security are a focus.