{"title":"Revisiting On-State Resistance as TSEP for Discrete SiC MOSFETs: Steps Towards the In-Circuit Approach","authors":"Enrico Panciroli;Alex Musetti;Alessandro Soldati","doi":"10.1109/OJPEL.2025.3560768","DOIUrl":null,"url":null,"abstract":"The knowledge of device junction temperature in real time allows to maximize the power density of power electronics converters, by means of active derating and dynamic overloading. Since junction temperature cannot be measured directly without altering the device, temperature-sensitive electric parameters (TSEPs) are used to indirectly estimate it. The dispersion of the device parameters affecting TSEPs requires their characterization on a per-device basis, thus limiting the adoption in commercial converters. In this paper, the on-state resistance TSEP is applied to silicon-carbide MOSFETs and a novel approach for the extraction of the characteristic curves is presented. Particularly, several methodologies are introduced to avoid putting the converter in a temperature-controlled environment, exploiting self heating and a modification of the cooling system. Moreover, self heating is induced by means of the novel controlled shoot-through (CST) technique, which does not need a load connected to the converter output. The TSEP curves are then characterized by using repetitive sawtooth current pulses on an inductive load, at different device temperatures. A cork cap is proposed to thermally insulate the device under test (DUT), blocking unwanted thermal paths, improving accuracy and minimizing the time needed for the characterization procedure. Finally, various modeling techniques are evaluated to identify the most suitable temperature estimation model, simplifying the calibration by reducing the number of acquired points while maintaining the highest possible accuracy. All these elements make the proposed methodology suitable for end-of-line testing in a production environment, thus enabling the individual characterization of each device of the power converter. The experimental validation of the results is performed against reference laboratory techniques, showing an overall RMS error below <inline-formula><tex-math>$1 \\,\\mathrm{^{\\circ }C}$</tex-math></inline-formula> when using the most complete estimation model, and less than <inline-formula><tex-math>$2 \\,\\mathrm{^{\\circ }C}$</tex-math></inline-formula> when employing a simplified reduced-order model.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"6 ","pages":"681-692"},"PeriodicalIF":5.0000,"publicationDate":"2025-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10964525","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE open journal of power electronics","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10964525/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
The knowledge of device junction temperature in real time allows to maximize the power density of power electronics converters, by means of active derating and dynamic overloading. Since junction temperature cannot be measured directly without altering the device, temperature-sensitive electric parameters (TSEPs) are used to indirectly estimate it. The dispersion of the device parameters affecting TSEPs requires their characterization on a per-device basis, thus limiting the adoption in commercial converters. In this paper, the on-state resistance TSEP is applied to silicon-carbide MOSFETs and a novel approach for the extraction of the characteristic curves is presented. Particularly, several methodologies are introduced to avoid putting the converter in a temperature-controlled environment, exploiting self heating and a modification of the cooling system. Moreover, self heating is induced by means of the novel controlled shoot-through (CST) technique, which does not need a load connected to the converter output. The TSEP curves are then characterized by using repetitive sawtooth current pulses on an inductive load, at different device temperatures. A cork cap is proposed to thermally insulate the device under test (DUT), blocking unwanted thermal paths, improving accuracy and minimizing the time needed for the characterization procedure. Finally, various modeling techniques are evaluated to identify the most suitable temperature estimation model, simplifying the calibration by reducing the number of acquired points while maintaining the highest possible accuracy. All these elements make the proposed methodology suitable for end-of-line testing in a production environment, thus enabling the individual characterization of each device of the power converter. The experimental validation of the results is performed against reference laboratory techniques, showing an overall RMS error below $1 \,\mathrm{^{\circ }C}$ when using the most complete estimation model, and less than $2 \,\mathrm{^{\circ }C}$ when employing a simplified reduced-order model.