An efficient surface-potential-based compact model for dynamically depleted silicon-on-insulator MOSFETs

IF 1.9 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Tianye Yu , Gongteng Xiao , Yudi Zhao , Guangxi Hu , Hongtao Xu , Ye Lu
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引用次数: 0

Abstract

This work proposes and develops a surface-potential-based compact model for dynamically depleted (DD) silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistors (MOSFETs). The surface potential model is obtained by incorporating an optimized initial guess function, together with an iterative approach. Then the electric current and capacitance models are developed based on the surface potential. The compact model results are compared with both technology computer-aided design simulations and measured data from industry, good agreements are observed. The developed model can capture the hump effect in gate capacitance-voltage curves during the transition from partial depletion to full depletion regimes. Furthermore, the model can ensure symmetry and differentiability, both of which are necessary for stable convergence in circuit-level simulations. It is noted that, the model can achieve balance between accuracy and computation efficiency in the simulations. As it can describe the electric characteristics of the DD SOI MOSFETs, the model is useful for the circuit design.
动态耗尽绝缘体上硅mosfet的高效表面电位紧凑模型
这项工作提出并发展了一个基于表面电位的紧凑模型,用于动态耗尽(DD)绝缘体上硅(SOI)金属氧化物半导体场效应晶体管(mosfet)。结合优化的初始猜测函数和迭代法,得到了表面电位模型。然后基于表面电位建立了电流和电容模型。将紧凑模型的计算结果与工业实测数据进行了比较,两者吻合较好。所建立的模型可以捕捉栅极电容电压曲线从部分耗尽到完全耗尽过渡过程中的驼峰效应。此外,该模型还能保证电路级仿真中稳定收敛所必需的对称性和可微性。仿真结果表明,该模型能够在精度和计算效率之间取得平衡。由于该模型可以描述DD SOI mosfet的电特性,因此对电路设计很有帮助。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
Microelectronics Journal
Microelectronics Journal 工程技术-工程:电子与电气
CiteScore
4.00
自引率
27.30%
发文量
222
审稿时长
43 days
期刊介绍: Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.
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