Maoxiang Yi , Zhengwen Liu , Zihao Miao , Yingchun Lu , Huaguo Liang , Lixiang Ma
{"title":"A true random number generator based on autonomous Boolean network with imbalanced node oscillation rings","authors":"Maoxiang Yi , Zhengwen Liu , Zihao Miao , Yingchun Lu , Huaguo Liang , Lixiang Ma","doi":"10.1016/j.mejo.2025.106694","DOIUrl":null,"url":null,"abstract":"<div><div>True random number generators have broad application prospects in the fields of hardware and information security. In order to improve the throughput of true random number generator with lower hardware overhead, an autonomous Boolean network with coupled basic logic units and imbalanced node oscillating rings is constructed as the entropy source. A first-order high-frequency oscillation loop is used to enhance the network refresh frequency, and a high entropy chaotic signal is generated through multi-level nonlinear coupling and amplification of the node output signals. Each output signal of the entropy circuit is sampled with D Flip-Flop and the result is sent to a post-processing circuit composed of XOR network, where the true random number is obtained. The proposed TRNG is implemented on Xilinx A7 FPGA development board. The sampled output data is grabbed and extracted in real time using the ChipScope IP module, and then transferred to computer for experimental testing. NIST SP800-22 and SP800-90B randomness tests are performed on the generated data, and some other important performances such as deviation, autocorrelation, and maximum Lyapunov exponent are also evaluated. The results show that at a throughput of 750Mbps, the proposed TRNG can generate true random numbers with entropy values of 0.996323bps, low deviation and low autocorrelation, being also of low hardware overhead.</div></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":"160 ","pages":"Article 106694"},"PeriodicalIF":1.9000,"publicationDate":"2025-04-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1879239125001432","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
True random number generators have broad application prospects in the fields of hardware and information security. In order to improve the throughput of true random number generator with lower hardware overhead, an autonomous Boolean network with coupled basic logic units and imbalanced node oscillating rings is constructed as the entropy source. A first-order high-frequency oscillation loop is used to enhance the network refresh frequency, and a high entropy chaotic signal is generated through multi-level nonlinear coupling and amplification of the node output signals. Each output signal of the entropy circuit is sampled with D Flip-Flop and the result is sent to a post-processing circuit composed of XOR network, where the true random number is obtained. The proposed TRNG is implemented on Xilinx A7 FPGA development board. The sampled output data is grabbed and extracted in real time using the ChipScope IP module, and then transferred to computer for experimental testing. NIST SP800-22 and SP800-90B randomness tests are performed on the generated data, and some other important performances such as deviation, autocorrelation, and maximum Lyapunov exponent are also evaluated. The results show that at a throughput of 750Mbps, the proposed TRNG can generate true random numbers with entropy values of 0.996323bps, low deviation and low autocorrelation, being also of low hardware overhead.
期刊介绍:
Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems.
The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc.
Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.