Miniaturized Micrometer-Level Copper Wiring and Electrodes Based on Reverse-Offset Printing for Flexible Circuits

IF 4.3 3区 材料科学 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
Kim Eiroma*, Asko Sneck, Olli Halonen, Tuomas Happonen, Henrik Sandberg and Jaakko Leppäniemi*, 
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引用次数: 0

Abstract

High-resolution reverse-offset printing (ROP) is developed for miniaturization of printed electronics, resulting in a notable decrease in material usage compared to conventional printing processes. Two alternative ROP processes for patterning of metal conductors are available that are comparable in their cost per sample: direct nanoparticle (NP) printing (e.g., Ag and Cu) and patterning of vacuum-deposited metal (Ag, Al, Au, Cu, Ti, etc.) films using ROP printed polymer resist ink and the lift-off (LO) process. In this work, we focus on ROP of Cu NP ink followed by intense pulsed light (IPL) sintering and vacuum-deposited Cu patterned by ROP lift-off (LO). The good large-scale uniformity of the two processes is demonstrated by a grid of 300 individual thickness, sheet resistance, and resistivity measurement points with low variation over the 10 cm × 10 cm printed sample area. Sheet resistances of 0.56 ± 0.03 and 1.23 ± 0.05 Ω/□ are obtained at 113 and 40 nm thickness for Cu NP and Cu LO, respectively. Both processes show <5% thickness variation over a large area. A line-space (L/S) resolution of 2 μm is obtained for ROP patterned vacuum-deposited Cu having very low line edge roughness (LER) (∼60 nm), whereas for direct ROP printed Cu NP ink, the L/S resolution (2–4 μm) is limited by LER (∼900 nm) and influenced by the printed layer thickness. Based on the two fabrication routes, a flexible chip component assembly process is presented. Preliminary bending resistance results indicate that both ROP-based patterning processes yield a robust electrical interconnection between the ultrathin polyimide (PI) 5 mm × 5 mm chip and thermoplastic polyurethane (TPU). ROP shows promise as a scalable and sustainable patterning method for flexible ICs/chips that are assembled on flexible, stretchable, or biodegradable substrates and used, e.g., in wearable, large-scale sensing, and in environmental monitoring.

基于柔性电路反胶印的微型化微米级铜线和电极
高分辨率反胶印(ROP)是为印刷电子产品的小型化而开发的,与传统印刷工艺相比,它显著减少了材料的使用。有两种可供选择的金属导体的ROP工艺,其每个样品的成本相当:直接纳米颗粒(NP)印刷(例如,Ag和Cu)和真空沉积金属(Ag, Al, Au, Cu, Ti等)薄膜的图案,使用ROP印刷的聚合物抗蚀剂油墨和升降(LO)工艺。在这项工作中,我们重点研究了铜NP油墨的ROP,然后是强脉冲光(IPL)烧结和真空沉积铜的ROP提升(LO)。在10 cm × 10 cm的印刷样品区域内,300个单独的厚度、薄片电阻和电阻率测点组成的网格变化很小,证明了这两种工艺具有良好的大规模均匀性。在113 nm和40 nm厚度下,铜NP和铜LO的片电阻分别为0.56±0.03和1.23±0.05 Ω/□。两种工艺在大面积上都显示出5%的厚度变化。对于具有非常低的线边缘粗糙度(LER) (~ 60 nm)的ROP图案真空沉积Cu,获得了2 μm的线空间(L/S)分辨率,而对于直接ROP印刷的Cu NP油墨,L/S分辨率(2 - 4 μm)受到LER (~ 900 nm)的限制,并受到印刷层厚度的影响。在此基础上,提出了一种柔性芯片组件组装工艺。初步的抗弯性能结果表明,两种基于rop的图像化工艺在超薄聚酰亚胺(PI) 5 mm × 5 mm芯片和热塑性聚氨酯(TPU)之间产生了强大的电互连。ROP有望成为柔性ic /芯片的一种可扩展和可持续的模式方法,这些芯片组装在柔性、可拉伸或可生物降解的基板上,并用于可穿戴、大规模传感和环境监测等领域。
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来源期刊
CiteScore
7.20
自引率
4.30%
发文量
567
期刊介绍: ACS Applied Electronic Materials is an interdisciplinary journal publishing original research covering all aspects of electronic materials. The journal is devoted to reports of new and original experimental and theoretical research of an applied nature that integrate knowledge in the areas of materials science, engineering, optics, physics, and chemistry into important applications of electronic materials. Sample research topics that span the journal's scope are inorganic, organic, ionic and polymeric materials with properties that include conducting, semiconducting, superconducting, insulating, dielectric, magnetic, optoelectronic, piezoelectric, ferroelectric and thermoelectric. Indexed/​Abstracted: Web of Science SCIE Scopus CAS INSPEC Portico
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