Spurious Suppression and Frequency Accuracy Enhancement in Direct Digital Frequency Synthesis: Analysis, Simulation, and Experiment

IF 5.6 2区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
Jiawen Lan;Liangqi Gui;Weihua She;Jinbo Hu;Liang Lang;Quanliang Huang
{"title":"Spurious Suppression and Frequency Accuracy Enhancement in Direct Digital Frequency Synthesis: Analysis, Simulation, and Experiment","authors":"Jiawen Lan;Liangqi Gui;Weihua She;Jinbo Hu;Liang Lang;Quanliang Huang","doi":"10.1109/TIM.2025.3557825","DOIUrl":null,"url":null,"abstract":"Direct digital frequency synthesis (DDS) technology has extensive applications across various fields, including instrumentation, communication, measurement, and aerospace. However, due to technical limitations in the digitization process, DDS still faces several challenges, such as spurs and frequency inaccuracy. Conventional dithering methods are limited in suppressing spurs, often increase the noise floor, and do not consider the improvement of frequency accuracy. This article proposes a random frequency compensation (RFC) method to address these issues, which effectively suppresses spurs without raising the noise floor and improves frequency accuracy. The main contributions of this work are threefold. First, we propose an innovative RFC method, which introduces a 1-bit random sequence to disrupt the periodic error sequence and compensate for the fractional part of the frequency control word, thereby simultaneously suppressing spurs and enhancing frequency accuracy. Second, we mathematically analyze the spurious suppression and frequency accuracy of the proposed method, supported by simulations to validate the theoretical effectiveness of the proposed RFC. Finally, to assess real-world performance, we implement the proposed RFC method on a field-programmable gate array (FPGA) and conduct experiments, demonstrating its superiority over conventional dithering methods and its potential for practical use.","PeriodicalId":13341,"journal":{"name":"IEEE Transactions on Instrumentation and Measurement","volume":"74 ","pages":"1-12"},"PeriodicalIF":5.6000,"publicationDate":"2025-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Instrumentation and Measurement","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10964066/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

Abstract

Direct digital frequency synthesis (DDS) technology has extensive applications across various fields, including instrumentation, communication, measurement, and aerospace. However, due to technical limitations in the digitization process, DDS still faces several challenges, such as spurs and frequency inaccuracy. Conventional dithering methods are limited in suppressing spurs, often increase the noise floor, and do not consider the improvement of frequency accuracy. This article proposes a random frequency compensation (RFC) method to address these issues, which effectively suppresses spurs without raising the noise floor and improves frequency accuracy. The main contributions of this work are threefold. First, we propose an innovative RFC method, which introduces a 1-bit random sequence to disrupt the periodic error sequence and compensate for the fractional part of the frequency control word, thereby simultaneously suppressing spurs and enhancing frequency accuracy. Second, we mathematically analyze the spurious suppression and frequency accuracy of the proposed method, supported by simulations to validate the theoretical effectiveness of the proposed RFC. Finally, to assess real-world performance, we implement the proposed RFC method on a field-programmable gate array (FPGA) and conduct experiments, demonstrating its superiority over conventional dithering methods and its potential for practical use.
直接数字频率合成中的杂散抑制和频率精度提高:分析、仿真和实验
直接数字频率合成(DDS)技术在仪器仪表、通信、测量和航空航天等领域有着广泛的应用。然而,由于数字化过程中的技术限制,DDS仍然面临着诸如杂散和频率不准确等挑战。传统的抖动方法在抑制杂散方面存在局限性,往往会增加本底噪声,而且没有考虑到频率精度的提高。本文提出了一种随机频率补偿(RFC)方法来解决这些问题,该方法在不提高本底噪声的情况下有效地抑制了杂散,提高了频率精度。这项工作的主要贡献有三个方面。首先,我们提出了一种创新的RFC方法,该方法引入1位随机序列来破坏周期性误差序列并补偿频率控制字的小数部分,从而同时抑制杂散并提高频率精度。其次,从数学上分析了该方法的杂散抑制和频率精度,并通过仿真验证了该方法的理论有效性。最后,为了评估实际性能,我们在现场可编程门阵列(FPGA)上实现了所提出的RFC方法并进行了实验,证明了其优于传统抖动方法及其实际应用潜力。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
IEEE Transactions on Instrumentation and Measurement
IEEE Transactions on Instrumentation and Measurement 工程技术-工程:电子与电气
CiteScore
9.00
自引率
23.20%
发文量
1294
审稿时长
3.9 months
期刊介绍: Papers are sought that address innovative solutions to the development and use of electrical and electronic instruments and equipment to measure, monitor and/or record physical phenomena for the purpose of advancing measurement science, methods, functionality and applications. The scope of these papers may encompass: (1) theory, methodology, and practice of measurement; (2) design, development and evaluation of instrumentation and measurement systems and components used in generating, acquiring, conditioning and processing signals; (3) analysis, representation, display, and preservation of the information obtained from a set of measurements; and (4) scientific and technical support to establishment and maintenance of technical standards in the field of Instrumentation and Measurement.
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信