{"title":"PttAcc: Pipeline-Based Taylor Expansion Fitting Arctangent Angle Hardware Accelerator Design for Descriptor Duty in ORB-SLAM System","authors":"Meng Liu;Fei Xiao;Ruijie Wang;Peiyuan Wan;Zhijie Chen;Dejian Li;Chongfei Shen","doi":"10.1109/LES.2024.3472731","DOIUrl":null,"url":null,"abstract":"In simultaneous localization and mapping (SLAM), the oriented FAST and rotated BRIEF (ORB) algorithm is key for feature detection and description, but its computational demands, particularly in arctangent angle computation, hinder real-time use on embedded systems. To solve this, we introduce PttAcc, a hardware accelerator using pipeline architecture and the Taylor expansion fitting algorithm. Our simulations show PttAcc significantly accelerates arctangent computation while maintaining accuracy, reducing total area by 82.56% and power consumption by 63.49% compared to coordinate rotation digital computer (CORDIC) components. It achieves a performance acceleration ratio of 15.8 and speeds up descriptor tasks by up to 4.3 times.","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"17 2","pages":"75-78"},"PeriodicalIF":1.7000,"publicationDate":"2024-10-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Embedded Systems Letters","FirstCategoryId":"94","ListUrlMain":"https://ieeexplore.ieee.org/document/10704693/","RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
In simultaneous localization and mapping (SLAM), the oriented FAST and rotated BRIEF (ORB) algorithm is key for feature detection and description, but its computational demands, particularly in arctangent angle computation, hinder real-time use on embedded systems. To solve this, we introduce PttAcc, a hardware accelerator using pipeline architecture and the Taylor expansion fitting algorithm. Our simulations show PttAcc significantly accelerates arctangent computation while maintaining accuracy, reducing total area by 82.56% and power consumption by 63.49% compared to coordinate rotation digital computer (CORDIC) components. It achieves a performance acceleration ratio of 15.8 and speeds up descriptor tasks by up to 4.3 times.
期刊介绍:
The IEEE Embedded Systems Letters (ESL), provides a forum for rapid dissemination of latest technical advances in embedded systems and related areas in embedded software. The emphasis is on models, methods, and tools that ensure secure, correct, efficient and robust design of embedded systems and their applications.