{"title":"Grey wolf optimization (GWO) based efficient partitioning algorithm VLSI circuits for reducing the interconnections","authors":"R. Pavithra Guru, V. Vaithianathan","doi":"10.1007/s10470-025-02334-y","DOIUrl":null,"url":null,"abstract":"<div><p>Many earlier partitioning studies used underlying partitioning methods to boost speed. As the problems grew in size and complexity, the partitioning technique application was insufficient to give outstanding results. Recent research has demonstrated the potential of multilevel techniques. A multilevel partitioning mechanism repeatedly divides the event until the size of the event is less than the specified limit, at which point it is un-coarsened using a partitioning refinement algorithm. A multi-faceted optimization problem was solved simultaneously in this study using the grey wolf optimization (GWO) technique. This work's methodology is based on information exchange and particle mobility inside a search space. In the partitioning phase of VLSI circuit optimization, multi-objective optimization challenges exist at the physical design level. The following sections present the results of multi-objective optimization of cut size delay and use the swarm technique (GWO). The GWO algorithm effectively solves the NP-hard problem, according to the conclusions of this research. Construct a concurrent multi-objective optimization issue and solve it using a programming technique. The circuit netlist files were utilized in the ISCAS’85 circuit benchmark suite to provide information on the circuit. This approach has much promise in VLSI circuit partitioning.</p></div>","PeriodicalId":7827,"journal":{"name":"Analog Integrated Circuits and Signal Processing","volume":"123 3","pages":""},"PeriodicalIF":1.2000,"publicationDate":"2025-04-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Analog Integrated Circuits and Signal Processing","FirstCategoryId":"5","ListUrlMain":"https://link.springer.com/article/10.1007/s10470-025-02334-y","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
Many earlier partitioning studies used underlying partitioning methods to boost speed. As the problems grew in size and complexity, the partitioning technique application was insufficient to give outstanding results. Recent research has demonstrated the potential of multilevel techniques. A multilevel partitioning mechanism repeatedly divides the event until the size of the event is less than the specified limit, at which point it is un-coarsened using a partitioning refinement algorithm. A multi-faceted optimization problem was solved simultaneously in this study using the grey wolf optimization (GWO) technique. This work's methodology is based on information exchange and particle mobility inside a search space. In the partitioning phase of VLSI circuit optimization, multi-objective optimization challenges exist at the physical design level. The following sections present the results of multi-objective optimization of cut size delay and use the swarm technique (GWO). The GWO algorithm effectively solves the NP-hard problem, according to the conclusions of this research. Construct a concurrent multi-objective optimization issue and solve it using a programming technique. The circuit netlist files were utilized in the ISCAS’85 circuit benchmark suite to provide information on the circuit. This approach has much promise in VLSI circuit partitioning.
期刊介绍:
Analog Integrated Circuits and Signal Processing is an archival peer reviewed journal dedicated to the design and application of analog, radio frequency (RF), and mixed signal integrated circuits (ICs) as well as signal processing circuits and systems. It features both new research results and tutorial views and reflects the large volume of cutting-edge research activity in the worldwide field today.
A partial list of topics includes analog and mixed signal interface circuits and systems; analog and RFIC design; data converters; active-RC, switched-capacitor, and continuous-time integrated filters; mixed analog/digital VLSI systems; wireless radio transceivers; clock and data recovery circuits; and high speed optoelectronic circuits and systems.