Bioinspired spider-web microchannel with five-input-four-output manifold: Enhanced thermal performance for 10,000 kW/m2 chip-scale embedded cooling

Abstract

Rapid advancements in high-heat flow density electronic chips have made the enhancement of heat sink thermal performance a crucial aspect of research aimed at efficient chip cooling. This paper uses the structure of a spider web to come up with an embedded flow-shape cooling method that can remove 10,000 kW/m² of heat. The temperature rise and junction temperature must be less than 60 °C and 85 °C, respectively. We compared two heat sinks with different flow shapes. The heat sinks’ thermal resistance, pressure drop, temperature distribution, temperature rise, junction temperature, and coefficient of performance (COP) of heat dissipation at flow rates of 0.2–0.6 L/min were reported using simulation calculations. As the inlet flow rate went up, the results showed that the temperature distribution became more uniform, and the average outlet temperature, temperature rise, temperature standard deviation, and junction temperature all went down. Notably, the five-input-four-output manifold design exhibited superior heat transfer efficiency and temperature uniformity compared to single-outlet structures, with lower thermal resistance. Under high heat flux conditions, the maximum temperature standard deviation was recorded at 1.18 °C, with a minimum of just 0.2 °C. With a pressure drop of 37.3 kPa and a flow rate of 0.6 L/min, the effective thermal resistance was a mere 0.047 (cm²·°C)/W. However, it is important to note that both radiators saw a bigger pressure drop and a lower COP as a result of the increased flow rate.