{"title":"SmartHeaP- A High-Level Programmable and Customized Hearing Aid System on Chip Integrated in a Research Hearing Aid Prototype","authors":"Jens Karrenbauer;Sven Schönewald;Simon Klein;Frederik Kautz;Kamil Adiloğlu;Claudia Kretzschmar;Tobias Bruns;Hans-Martin Bluethgen;Meinolf Blawat;Jens Benndorf;Holger Blume","doi":"10.1109/TBCAS.2024.3481044","DOIUrl":null,"url":null,"abstract":"Hearing loss is one of the most common sensory deficiencies. Hearing aids with adaptable personalized signal processing can further enhance the social lives of those affected. To investigate the degree of possible improvements, high-level programmable, low-power, and portable behind-the-ear (BTE) research platforms are needed to conduct studies in the real world and not just in the laboratory. However, as the hearing aid market is very restrictive and, to the best of our knowledge, no research platforms in BTE size are available, this paper presents a fully embedded hearing aid prototype in a BTE form factor as one of the contributions. The device integrates wireless interfaces such as Bluetooth Low Energy (BLE) and Near Field Magnetic Induction (NFMI). Despite its small size and weight of only 5 grams, it can be used for studies lasting up to nine hours with state-of-the-art hearing algorithms. As a key component to achieve this low power consumption while executing these computationally demanding algorithms, this paper presents a newly designed Smart Hearing Aid Processor (SmartHeaP) System on Chip (SoC). It is a mixed-signal and application-specific integrated circuit (ASIC) with an adaptive body bias (ABB) unit fabricated in 22nm fully-depleted silicon-on-insulator (FD-SOI) technology. Furthermore, the SoC integrates two application-specific instruction set processors (ASIPs) designed using virtual prototyping approaches. The SoC is high-level programmable and tailored to hearing aid applications, capable of running, e.g., a binaural beamformer with a power consumption of 1.45 mW <inline-formula><tex-math>$\\boldsymbol{@}$</tex-math></inline-formula> 5 MHz.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"19 3","pages":"669-685"},"PeriodicalIF":0.0000,"publicationDate":"2024-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE transactions on biomedical circuits and systems","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10720527/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Hearing loss is one of the most common sensory deficiencies. Hearing aids with adaptable personalized signal processing can further enhance the social lives of those affected. To investigate the degree of possible improvements, high-level programmable, low-power, and portable behind-the-ear (BTE) research platforms are needed to conduct studies in the real world and not just in the laboratory. However, as the hearing aid market is very restrictive and, to the best of our knowledge, no research platforms in BTE size are available, this paper presents a fully embedded hearing aid prototype in a BTE form factor as one of the contributions. The device integrates wireless interfaces such as Bluetooth Low Energy (BLE) and Near Field Magnetic Induction (NFMI). Despite its small size and weight of only 5 grams, it can be used for studies lasting up to nine hours with state-of-the-art hearing algorithms. As a key component to achieve this low power consumption while executing these computationally demanding algorithms, this paper presents a newly designed Smart Hearing Aid Processor (SmartHeaP) System on Chip (SoC). It is a mixed-signal and application-specific integrated circuit (ASIC) with an adaptive body bias (ABB) unit fabricated in 22nm fully-depleted silicon-on-insulator (FD-SOI) technology. Furthermore, the SoC integrates two application-specific instruction set processors (ASIPs) designed using virtual prototyping approaches. The SoC is high-level programmable and tailored to hearing aid applications, capable of running, e.g., a binaural beamformer with a power consumption of 1.45 mW $\boldsymbol{@}$ 5 MHz.