FPGA implementation of intelligent battery management unit (i-BMU) based on dynamic power distribution technique for electric vehicles

IF 1.2 4区 工程技术 Q4 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
R. Daisy Merina, R. Saravana Ram, Lordwin Cecil Prabhaker Micheal
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引用次数: 0

Abstract

Electric Vehicle (EV) efficiency is highly dependent on optimal power management strategies. Conventional Static Power Distribution Techniques limit the vehicle’s range and energy efficiency due to their inability to adapt to dynamic driving conditions. This paper proposes an Intelligent Power Distribution Technique enabled by a Deep Neural Network-based battery management unit (BMU), implemented on an FPGA architecture. The MPSoC efficiently interfaces with multiple sensors, including Hall Effect sensors for speed and voltage measurement, a shunt-based current sensor, and a potentiometer for throttle position detection. Data collection was conducted in Chennai, India, where key parameters such as speed, throttle position, battery voltage, battery current, and GPS coordinates were recorded at 10-min intervals over 30 days. The performance evaluation of the FPGA implementation reveals optimized chip area utilization (97.25 mm2) and reduced power consumption (6.391 W) compared to conventional battery management systems. Additionally, an LSTM-based State of Charge (SoC) estimation model was developed, outperforming traditional Coulomb Counting and Kalman Filtering methods with an MAE of 0.0250 and RMSE of 0.0288. Dynamic power distribution techniques further optimized energy consumption across different driving cycles, leading to a notable improvement in EV mileage. Compared to static power allocation, the proposed intelligent power distribution technique achieved an increase of 7.8% (471.09 km) in urban driving, 12.21% (490.33 km) in highway conditions, and 10.8% (484.20 km) in downhill scenarios. Sensitivity analysis of speed and throttle position on battery voltage and current highlights crucial insights for efficient energy management. The proposed i-BMU enhances battery longevity, reduces power consumption, and improves overall EV efficiency, making it a promising solution for next-generation electric mobility.

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来源期刊
Analog Integrated Circuits and Signal Processing
Analog Integrated Circuits and Signal Processing 工程技术-工程:电子与电气
CiteScore
0.30
自引率
7.10%
发文量
141
审稿时长
7.3 months
期刊介绍: Analog Integrated Circuits and Signal Processing is an archival peer reviewed journal dedicated to the design and application of analog, radio frequency (RF), and mixed signal integrated circuits (ICs) as well as signal processing circuits and systems. It features both new research results and tutorial views and reflects the large volume of cutting-edge research activity in the worldwide field today. A partial list of topics includes analog and mixed signal interface circuits and systems; analog and RFIC design; data converters; active-RC, switched-capacitor, and continuous-time integrated filters; mixed analog/digital VLSI systems; wireless radio transceivers; clock and data recovery circuits; and high speed optoelectronic circuits and systems.
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