A Time-Domain Multi-Channel Resistive-Sensor Interface IC With High Energy Efficiency and Wide Input Range

Sunglim Han;Hoyong Seong;Sein Oh;Jimin Koo;Hanbit Jin;Hye Jin Kim;Sohmyung Ha;Minkyu Je
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Abstract

This paper presents a 72-channel resistive-sensor interface integrated circuit (IC). The proposed IC consists of 8 sensor oscillator units and a reference clock generator. The sensor oscillator (S-OSC) units generate pulses with pulse widths dependent on the sensor input values, and the pulses are oversampled by the reference clock using frequency dividers. The time-domain signals are fed to the time-to-digital converters (TDCs) and converted to digital values. Each S-OSC unit is time-multiplexed to measure the resistance values from 9 sensors. Multiple phases from a highly energy-efficient phase-locked loop (PLL) are used for the TDCs, resulting in a signal-to-quantization-noise ratio (SQNR) that exceeds the intrinsic signal-to-noise ratio (SNR) of the sensor oscillators. This results in an effective number of bits (ENOB) of 9.3 bits at 310 pJ per channel. The maximum ENOB that can be achieved with a division ratio (N) of 256 is 14.1 bits and can be adjusted by changing N. Using this time-domain interface approach, the IC converts the sensor resistances directly into time, extending its measurement capabilities to 10 M$\Omega$. The proposed IC, designed and fabricated in a 180-nm CMOS process with an active area of 0.015 mm${}^{2}$, consumes only 15.07 $\mu$W per channel, resulting in a channel-specific Walden figure of merit (FoM) of 0.48 pJ per conversion step. In addition, by tuning N, the IC achieves an outstanding Schreier FoM of 159.8 dB in high-resolution scenarios.
一种高能效宽输入范围时域多通道电阻式传感器接口集成电路
本文提出了一种72通道电阻式传感器接口集成电路。该集成电路由8个传感器振荡器单元和一个参考时钟发生器组成。传感器振荡器(S-OSC)单元产生脉冲宽度取决于传感器输入值的脉冲,脉冲由使用分频器的参考时钟过采样。时域信号被馈送到时间-数字转换器(tdc)并转换成数字值。每个S-OSC单元都是时间复用的,用于测量来自9个传感器的电阻值。tdc采用了高能效锁相环(PLL)的多相,导致信号-量化-噪声比(SQNR)超过传感器振荡器的固有信噪比(SNR)。这导致在每通道310 pJ时的有效位数(ENOB)为9.3位。当分割比(N)为256时,最大ENOB为14.1位,可通过改变N来调整。采用这种时域接口方法,IC将传感器电阻直接转换为时间,将其测量能力扩展到10 M $\Omega$。该IC采用180nm CMOS工艺设计和制造,有源面积为0.015 mm ${}^{2}$,每个通道仅消耗15.07 $\mu$ W,导致每个转换步骤的特定通道瓦尔登优点系数(FoM)为0.48 pJ。此外,通过调整N,该IC在高分辨率场景下实现了159.8 dB的出色施雷埃FoM。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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