Single-step electron beam evaporation for integrated dual-metal gate and gate field-plate in GaN-on-Si MIS-HEMTs

IF 1.9 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Microelectronics Journal Pub Date : 2025-03-26 DOI:10.1016/j.mejo.2025.106663

Sheng Gao , Yanjun Wu , Xingyu Luo , Shengqi Yu , Qi Wang

{"title":"Single-step electron beam evaporation for integrated dual-metal gate and gate field-plate in GaN-on-Si MIS-HEMTs","authors":"Sheng Gao , Yanjun Wu , Xingyu Luo , Shengqi Yu , Qi Wang","doi":"10.1016/j.mejo.2025.106663","DOIUrl":null,"url":null,"abstract":"<div><div>This work reports the demonstration high performance GaN-on-Si metal-insulator-semiconductor (MIS) high-electron-mobility transistors (HEMTs) featuring dual-metal gate (DMG) and gate field-plate (GFP) structures. The DMG-GFP structures can be realized in a single step by adjusting the angle of electron beam evaporation, eliminating the requirement for multiple process steps. Higher carrier transfer efficiency and more uniform electric field distribution of the DMG-GFP-HEMTs (gate to drain distance LGD of 18 μm) result in a pronounced enhancement of drain current (ID) and transconductance (Gm) by 15 %, a remarkable breakdown voltage (Vbr) increases of 44.9 %, and a significantly reduced current collapse over the single metal gate (SMG) control devices. Besides, the Vbr of DMG-GFP-HEMTs exhibits a noteworthy 16.8 % improvement compared to SMG-GFP-HEMTs, further validating the advantageous impact of the DMG structure on Vbr performance. Weibull analysis at 25 °C extrapolated a 10-year maximum operating gate voltage of 6.4 V for DMG-GFP HEMTs, a 16.3 % improvement over SMG-GFP HEMTs. The mechanism of DMG-GFP structures for suppressing current collapse has also been investigated, where the DMG structure helps to weaken the electron capture effect on the AlGaN/SiNx interface and the GFP structure enables the timely release of trapped electrons.</div></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":"159 ","pages":"Article 106663"},"PeriodicalIF":1.9000,"publicationDate":"2025-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1879239125001122","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}

引用次数: 0

Abstract

This work reports the demonstration high performance GaN-on-Si metal-insulator-semiconductor (MIS) high-electron-mobility transistors (HEMTs) featuring dual-metal gate (DMG) and gate field-plate (GFP) structures. The DMG-GFP structures can be realized in a single step by adjusting the angle of electron beam evaporation, eliminating the requirement for multiple process steps. Higher carrier transfer efficiency and more uniform electric field distribution of the DMG-GFP-HEMTs (gate to drain distance L_GD of 18 μm) result in a pronounced enhancement of drain current (I_D) and transconductance (G_m) by 15 %, a remarkable breakdown voltage (V_br) increases of 44.9 %, and a significantly reduced current collapse over the single metal gate (SMG) control devices. Besides, the V_br of DMG-GFP-HEMTs exhibits a noteworthy 16.8 % improvement compared to SMG-GFP-HEMTs, further validating the advantageous impact of the DMG structure on V_br performance. Weibull analysis at 25 °C extrapolated a 10-year maximum operating gate voltage of 6.4 V for DMG-GFP HEMTs, a 16.3 % improvement over SMG-GFP HEMTs. The mechanism of DMG-GFP structures for suppressing current collapse has also been investigated, where the DMG structure helps to weaken the electron capture effect on the AlGaN/SiNx interface and the GFP structure enables the timely release of trapped electrons.

查看原文本刊更多论文

求助全文

约1分钟内获得全文求助全文

来源期刊

Microelectronics Journal 工程技术-工程：电子与电气

CiteScore

4.00

自引率

27.30%

发文量

222

审稿时长

43 days

期刊介绍： Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.