{"title":"A Review on Micro-Watts All-Digital Frequency Synthesizers.","authors":"Venkadasamy Navaneethan, Boon Chiat Terence Teo, Annamalai Arasu Muthukumaraswamy, Xian Yang Lim, Liter Siek","doi":"10.3390/mi16030333","DOIUrl":null,"url":null,"abstract":"<p><p>This paper reviews recent developments in highly integrated all-digital frequency synthesizers suitable to deploy in low-power internet-of-things (IoT) applications. This review sets low power consumption as a key criterion for exploring the all-digital frequency synthesizer implemented in CMOS fabrication technology. The alignment with mainstream CMOS technology offers high-density, comprehensive, robust signal processing capability, making it very suitable for all-digital phase-locked loops to harvest that capacity, and it becomes inevitable. This review includes various divider-less low-power frequency synthesizers, including all-digital phase-locked loops (ADPLL), all-digital frequency-locked loops (ADFLL), and hybrid PLLs. This paper also discusses the latest architectural developments for ADPLLs to lead to low-power implementation, such as DTC-assisted TDC, embedded TDC, and various levels of hybridization in ADPLLs.</p>","PeriodicalId":18508,"journal":{"name":"Micromachines","volume":"16 3","pages":""},"PeriodicalIF":3.0000,"publicationDate":"2025-03-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.ncbi.nlm.nih.gov/pmc/articles/PMC11944421/pdf/","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Micromachines","FirstCategoryId":"5","ListUrlMain":"https://doi.org/10.3390/mi16030333","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"CHEMISTRY, ANALYTICAL","Score":null,"Total":0}
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Abstract
This paper reviews recent developments in highly integrated all-digital frequency synthesizers suitable to deploy in low-power internet-of-things (IoT) applications. This review sets low power consumption as a key criterion for exploring the all-digital frequency synthesizer implemented in CMOS fabrication technology. The alignment with mainstream CMOS technology offers high-density, comprehensive, robust signal processing capability, making it very suitable for all-digital phase-locked loops to harvest that capacity, and it becomes inevitable. This review includes various divider-less low-power frequency synthesizers, including all-digital phase-locked loops (ADPLL), all-digital frequency-locked loops (ADFLL), and hybrid PLLs. This paper also discusses the latest architectural developments for ADPLLs to lead to low-power implementation, such as DTC-assisted TDC, embedded TDC, and various levels of hybridization in ADPLLs.
期刊介绍：
Micromachines (ISSN 2072-666X) is an international, peer-reviewed open access journal which provides an advanced forum for studies related to micro-scaled machines and micromachinery. It publishes reviews, regular research papers and short communications. Our aim is to encourage scientists to publish their experimental and theoretical results in as much detail as possible. There is no restriction on the length of the papers. The full experimental details must be provided so that the results can be reproduced.
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