Design of 32 × 32 (1 KB) SRAM array using 10T SRAM cell for portable low power biomedical applications

IF 1.4 4区 工程技术 Q4 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Appikatla Phani Kumar, Rohit Lorenzo
{"title":"Design of 32 × 32 (1 KB) SRAM array using 10T SRAM cell for portable low power biomedical applications","authors":"Appikatla Phani Kumar,&nbsp;Rohit Lorenzo","doi":"10.1007/s10470-025-02386-0","DOIUrl":null,"url":null,"abstract":"<div><p>Biomedical applications like body area networks (BAN) necessitate the construction of power optimized SRAMs to enhance the batteries life at BAN nodes. In this work, we have designed one-sided near threshold 10TSRAM array for low power portable biomedical applications. The proposed near threshold 10T SRAM (PNT10T SRAM) employs a cross-connected schmitt trigger (ST) inverter and normal inverter in its cell core. The separate path for reading is also employed to eliminate the reading disturbance. The write disturbance is removed in the PNT10T SRAM by removing the trail from VDD and ground. The writing ability is improved with the use of feedback-cutting approach. The standby power dissipation of the memory is mitigated with the use a tail transistor, virtual ground (VGND). The proposed design mitigates the half-select problem due to column-based transistor controlled by CCL. To evaluate the performance, the PNT10T SRAM is compared with C6T, ST11T, ST9T, TG9T, SE9T, and SLE10T SRAM cells using FinFET 18 nm technology at 0.6 V power supply. The PNT10T SRAM mitigates the read power, write power, and leakage power by 51.10%, 50.57%, and 78.97%. Furthermore, the read and write static noise margins improved by 54% and 39.5% respectively, compared to conventional6T (C6T) SRAM.</p></div>","PeriodicalId":7827,"journal":{"name":"Analog Integrated Circuits and Signal Processing","volume":"123 2","pages":""},"PeriodicalIF":1.4000,"publicationDate":"2025-03-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Analog Integrated Circuits and Signal Processing","FirstCategoryId":"5","ListUrlMain":"https://link.springer.com/article/10.1007/s10470-025-02386-0","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0

Abstract

Biomedical applications like body area networks (BAN) necessitate the construction of power optimized SRAMs to enhance the batteries life at BAN nodes. In this work, we have designed one-sided near threshold 10TSRAM array for low power portable biomedical applications. The proposed near threshold 10T SRAM (PNT10T SRAM) employs a cross-connected schmitt trigger (ST) inverter and normal inverter in its cell core. The separate path for reading is also employed to eliminate the reading disturbance. The write disturbance is removed in the PNT10T SRAM by removing the trail from VDD and ground. The writing ability is improved with the use of feedback-cutting approach. The standby power dissipation of the memory is mitigated with the use a tail transistor, virtual ground (VGND). The proposed design mitigates the half-select problem due to column-based transistor controlled by CCL. To evaluate the performance, the PNT10T SRAM is compared with C6T, ST11T, ST9T, TG9T, SE9T, and SLE10T SRAM cells using FinFET 18 nm technology at 0.6 V power supply. The PNT10T SRAM mitigates the read power, write power, and leakage power by 51.10%, 50.57%, and 78.97%. Furthermore, the read and write static noise margins improved by 54% and 39.5% respectively, compared to conventional6T (C6T) SRAM.

Abstract Image

采用10T SRAM单元设计用于便携式低功耗生物医学应用的32 × 32 (1 KB) SRAM阵列
人体区域网络(BAN)等生物医学应用需要构建功率优化的sram,以提高BAN节点上的电池寿命。在这项工作中,我们设计了用于低功耗便携式生物医学应用的单侧近阈值10TSRAM阵列。提出的近阈值10T SRAM (PNT10T SRAM)在其单元核心中采用交叉连接的施密特触发(ST)逆变器和普通逆变器。采用独立的阅读路径,消除了阅读干扰。在PNT10T SRAM中,通过去除VDD和地的跟踪来消除写干扰。采用反馈切割法,提高了学生的写作能力。通过使用尾晶体管虚拟地(VGND),降低了存储器的待机功耗。该设计减轻了由CCL控制的列基晶体管所造成的半选择问题。为了评估PNT10T SRAM的性能,在0.6 V电源下,将PNT10T SRAM与采用FinFET 18nm技术的C6T、ST11T、ST9T、TG9T、SE9T和SLE10T SRAM电池进行了比较。PNT10T SRAM的读功率、写功率和漏功率分别降低51.10%、50.57%和78.97%。此外,与传统的6t (C6T) SRAM相比,读和写静态噪声边际分别提高了54%和39.5%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
Analog Integrated Circuits and Signal Processing
Analog Integrated Circuits and Signal Processing 工程技术-工程:电子与电气
CiteScore
0.30
自引率
7.10%
发文量
141
审稿时长
7.3 months
期刊介绍: Analog Integrated Circuits and Signal Processing is an archival peer reviewed journal dedicated to the design and application of analog, radio frequency (RF), and mixed signal integrated circuits (ICs) as well as signal processing circuits and systems. It features both new research results and tutorial views and reflects the large volume of cutting-edge research activity in the worldwide field today. A partial list of topics includes analog and mixed signal interface circuits and systems; analog and RFIC design; data converters; active-RC, switched-capacitor, and continuous-time integrated filters; mixed analog/digital VLSI systems; wireless radio transceivers; clock and data recovery circuits; and high speed optoelectronic circuits and systems.
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信