Self-Biased Silicon Transistor with Piezoelectric Gate for Efficient Mechanical Energy Harvesting Device

Abstract

In this report, a piezo potential gated self-biased transistor has been fabricated on the heavily doped silicon (p⁺-Si) (111) substrate and used for efficient mechanical energy harvesting applications. The drain and source (S-D) electrode of this top gated transistor is made of LiF(5 nm)/Al(65 nm) and MoO₃(5 nm)/Ag(65 nm) respectively whereas piezoelectric Poly (vinylidene fluoride-co-hexapropelene) (PVDF-HFP) thin film has been used as a gate dielectric. Drain bias (V_DS) which is required to transport the hole carrier through the channel, has been developed from the work function difference of S-D electrodes whereas piezopotential which is developed due to the external force applied on the PVDF-HFP thin film works as gate bias of this transistor. As a consequence, this device converts mechanical energy to electrical energy very efficiently. For applied pressure of 4 bar for ~5 sec, the extracted electrical power per cycle of this device is 1.6 x 10^-9 watts with a conversion efficiency of ~75% which is extremely high value w.r.t conventional energy harvesting devices. Besides, electrical characterization shows its transistor-like behavior and the extracted device parameters like threshold force, On-Off ratio, and subthreshold swing (SS) are 0.5 N, 4.56 x 10², and 3.16 N/A, respectively.