A double-modules interlocking triple-node upset-tolerant latch design

IF 1.9 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Microelectronics Journal Pub Date : 2025-03-17 DOI:10.1016/j.mejo.2025.106647

Shiyu Zhao, Qiang Zhao, Licai Hao, Hao Wang, Lang Tian, Chunyu Peng, Wenjuan Lu, Zhiting Lin, Xiulong Wu

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引用次数: 0

Abstract

In the design of nanoscale latches, multi-node upset (MNU) caused by charge-sharing effects are a major reliability issue. To effectively tolerate MNU under single event effects (SEE), this paper proposes a double-modules interlocking triple-node upset (DMITNU) tolerant latch design. Based on the radiation upset mechanism, utilizing polarity hardened and source isolation techniques, the proposed DMITNU latch can effectively reduce the number of sensitive nodes. The interlocking connection of two basic modules not only cleverly reduces the number of transistors, thereby lowering circuit overhead, but also enhances the MNU radiation tolerance characteristics of the DMITNU latch. Fault injection methods verified the recovery tolerance of the proposed latch. Compared to advanced TNU tolerant latch designs, the proposed DMITNU latch achieved an average improvement of 61 % in the area-power-delay-product (PDAP). Analysis of PVT variations confirmed that the DMITNU latch maintains good stability under harsh environments. Additionally, Monte Carlo (MC) simulations demonstrated that the DMITNU latch has excellent data storage reliability.

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来源期刊

Microelectronics Journal 工程技术-工程：电子与电气

CiteScore

4.00

自引率

27.30%

发文量

222

审稿时长

43 days

期刊介绍： Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.