Rohan Rohidas Naik , Lokesh Kumar Bramhane , T. Veerakumar , Amol D. Rahulkar , Jawar Singh
{"title":"Extruded source gate TFET for completely suppressed ambipolar current","authors":"Rohan Rohidas Naik , Lokesh Kumar Bramhane , T. Veerakumar , Amol D. Rahulkar , Jawar Singh","doi":"10.1016/j.micrna.2025.208142","DOIUrl":null,"url":null,"abstract":"<div><div>This paper introduces two advanced TFET structures designed to suppress ambipolar current effectively: the extruded source gate doping-less TFET (ESG-DL-TFET) and the extruded source gate metal-layer doping-less TFET (ESG-ML-DL-TFET). By incorporating an extruded gate–source region and an abrupt gate–drain junction, both devices restrict the gate’s influence to the source-channel band-to-band tunneling (BTBT) process, thereby minimizing tunneling at the channel-drain interface. This approach enables high <span><math><mrow><msub><mrow><mi>I</mi></mrow><mrow><mi>O</mi><mi>N</mi></mrow></msub><mo>/</mo><msub><mrow><mi>I</mi></mrow><mrow><mi>O</mi><mi>F</mi><mi>F</mi></mrow></msub></mrow></math></span> ratios and steep subthreshold swing (SS), essential for energy-efficient operation, without sacrificing drive current or overall performance. Notably, the ESG-DL-TFET significantly reduces ambipolar current relative to the conventional DL-TFET, while the ESG-ML-DL-TFET achieves complete suppression compared to the standard ML-DL-TFET. Extensive 2D simulations using Atlas Silvaco were conducted, analyzing device behavior across different extruded gate–source lengths and determining the optimal extruded height for total ambipolar current suppression. Additionally, minor reductions in drain current, <span><math><msub><mrow><mi>I</mi></mrow><mrow><mi>O</mi><mi>N</mi></mrow></msub></math></span>, and SS observed in the proposed structures can be mitigated by tuning the metal layer’s work function and gate electrode work function. The effect of temperature variation on the transfer characteristics of proposed devices was also simulated. These findings underscore the potential of ESG-DL-TFET and ESG-ML-DL-TFET architectures to enhance BTBT efficiency while minimizing ambipolarity, offering promising solutions for low-power electronic applications.</div></div>","PeriodicalId":100923,"journal":{"name":"Micro and Nanostructures","volume":"204 ","pages":"Article 208142"},"PeriodicalIF":2.7000,"publicationDate":"2025-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Micro and Nanostructures","FirstCategoryId":"1085","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S2773012325000718","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"PHYSICS, CONDENSED MATTER","Score":null,"Total":0}
引用次数: 0
Abstract
This paper introduces two advanced TFET structures designed to suppress ambipolar current effectively: the extruded source gate doping-less TFET (ESG-DL-TFET) and the extruded source gate metal-layer doping-less TFET (ESG-ML-DL-TFET). By incorporating an extruded gate–source region and an abrupt gate–drain junction, both devices restrict the gate’s influence to the source-channel band-to-band tunneling (BTBT) process, thereby minimizing tunneling at the channel-drain interface. This approach enables high ratios and steep subthreshold swing (SS), essential for energy-efficient operation, without sacrificing drive current or overall performance. Notably, the ESG-DL-TFET significantly reduces ambipolar current relative to the conventional DL-TFET, while the ESG-ML-DL-TFET achieves complete suppression compared to the standard ML-DL-TFET. Extensive 2D simulations using Atlas Silvaco were conducted, analyzing device behavior across different extruded gate–source lengths and determining the optimal extruded height for total ambipolar current suppression. Additionally, minor reductions in drain current, , and SS observed in the proposed structures can be mitigated by tuning the metal layer’s work function and gate electrode work function. The effect of temperature variation on the transfer characteristics of proposed devices was also simulated. These findings underscore the potential of ESG-DL-TFET and ESG-ML-DL-TFET architectures to enhance BTBT efficiency while minimizing ambipolarity, offering promising solutions for low-power electronic applications.