Extruded source gate TFET for completely suppressed ambipolar current

IF 2.7 Q2 PHYSICS, CONDENSED MATTER
Rohan Rohidas Naik , Lokesh Kumar Bramhane , T. Veerakumar , Amol D. Rahulkar , Jawar Singh
{"title":"Extruded source gate TFET for completely suppressed ambipolar current","authors":"Rohan Rohidas Naik ,&nbsp;Lokesh Kumar Bramhane ,&nbsp;T. Veerakumar ,&nbsp;Amol D. Rahulkar ,&nbsp;Jawar Singh","doi":"10.1016/j.micrna.2025.208142","DOIUrl":null,"url":null,"abstract":"<div><div>This paper introduces two advanced TFET structures designed to suppress ambipolar current effectively: the extruded source gate doping-less TFET (ESG-DL-TFET) and the extruded source gate metal-layer doping-less TFET (ESG-ML-DL-TFET). By incorporating an extruded gate–source region and an abrupt gate–drain junction, both devices restrict the gate’s influence to the source-channel band-to-band tunneling (BTBT) process, thereby minimizing tunneling at the channel-drain interface. This approach enables high <span><math><mrow><msub><mrow><mi>I</mi></mrow><mrow><mi>O</mi><mi>N</mi></mrow></msub><mo>/</mo><msub><mrow><mi>I</mi></mrow><mrow><mi>O</mi><mi>F</mi><mi>F</mi></mrow></msub></mrow></math></span> ratios and steep subthreshold swing (SS), essential for energy-efficient operation, without sacrificing drive current or overall performance. Notably, the ESG-DL-TFET significantly reduces ambipolar current relative to the conventional DL-TFET, while the ESG-ML-DL-TFET achieves complete suppression compared to the standard ML-DL-TFET. Extensive 2D simulations using Atlas Silvaco were conducted, analyzing device behavior across different extruded gate–source lengths and determining the optimal extruded height for total ambipolar current suppression. Additionally, minor reductions in drain current, <span><math><msub><mrow><mi>I</mi></mrow><mrow><mi>O</mi><mi>N</mi></mrow></msub></math></span>, and SS observed in the proposed structures can be mitigated by tuning the metal layer’s work function and gate electrode work function. The effect of temperature variation on the transfer characteristics of proposed devices was also simulated. These findings underscore the potential of ESG-DL-TFET and ESG-ML-DL-TFET architectures to enhance BTBT efficiency while minimizing ambipolarity, offering promising solutions for low-power electronic applications.</div></div>","PeriodicalId":100923,"journal":{"name":"Micro and Nanostructures","volume":"204 ","pages":"Article 208142"},"PeriodicalIF":2.7000,"publicationDate":"2025-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Micro and Nanostructures","FirstCategoryId":"1085","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S2773012325000718","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"PHYSICS, CONDENSED MATTER","Score":null,"Total":0}
引用次数: 0

Abstract

This paper introduces two advanced TFET structures designed to suppress ambipolar current effectively: the extruded source gate doping-less TFET (ESG-DL-TFET) and the extruded source gate metal-layer doping-less TFET (ESG-ML-DL-TFET). By incorporating an extruded gate–source region and an abrupt gate–drain junction, both devices restrict the gate’s influence to the source-channel band-to-band tunneling (BTBT) process, thereby minimizing tunneling at the channel-drain interface. This approach enables high ION/IOFF ratios and steep subthreshold swing (SS), essential for energy-efficient operation, without sacrificing drive current or overall performance. Notably, the ESG-DL-TFET significantly reduces ambipolar current relative to the conventional DL-TFET, while the ESG-ML-DL-TFET achieves complete suppression compared to the standard ML-DL-TFET. Extensive 2D simulations using Atlas Silvaco were conducted, analyzing device behavior across different extruded gate–source lengths and determining the optimal extruded height for total ambipolar current suppression. Additionally, minor reductions in drain current, ION, and SS observed in the proposed structures can be mitigated by tuning the metal layer’s work function and gate electrode work function. The effect of temperature variation on the transfer characteristics of proposed devices was also simulated. These findings underscore the potential of ESG-DL-TFET and ESG-ML-DL-TFET architectures to enhance BTBT efficiency while minimizing ambipolarity, offering promising solutions for low-power electronic applications.
完全抑制双极电流的挤压源栅TFET
本文介绍了两种有效抑制双极电流的新型TFET结构:挤压源栅无掺杂TFET (ESG-DL-TFET)和挤压源栅金属层无掺杂TFET (ESG-ML-DL-TFET)。通过结合一个挤压的栅极-源区和一个突发性的栅极-漏极结,这两个器件都将栅极的影响限制在源信道带到带隧穿(BTBT)过程中,从而最大限度地减少了通道-漏极界面的隧穿。这种方法可以实现高离子/IOFF比和陡峭的亚阈值摆幅(SS),这对节能操作至关重要,而不会牺牲驱动电流或整体性能。值得注意的是,与传统的DL-TFET相比,ESG-DL-TFET显著降低了双极电流,而与标准ML-DL-TFET相比,ESG-ML-DL-TFET实现了完全抑制。利用Atlas Silvaco进行了广泛的二维模拟,分析了不同挤压栅源长度下器件的行为,并确定了抑制总双极电流的最佳挤压高度。此外,在所提出的结构中观察到的漏极电流、离子和SS的微小减少可以通过调整金属层的功函数和栅电极功函数来减轻。模拟了温度变化对器件传输特性的影响。这些发现强调了ESG-DL-TFET和ESG-ML-DL-TFET架构在提高BTBT效率的同时最小化双极性的潜力,为低功耗电子应用提供了有前途的解决方案。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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CiteScore
6.50
自引率
0.00%
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