A neuromorphic hardware architecture based on TTFS coding with temporal quantization for spiking neural networks

Abstract

In recent years, spiking neural networks (SNNs) have gained significant attention due to their biologically realistic and event-driven properties. Time-to-First-Spike (TTFS) coding is a coding scheme for SNNs where neurons are fired only once throughout the inference process, reducing the number of spikes and improving energy efficiency. However, the SNNs with TTFS coding have an issue of low classification accuracy. This paper first introduces TQ-TTFS, a temporal quantization on the TTFS neuron model to address this issue. TQ-TTFS significantly alleviates overfitting caused by early firing and improves the classification accuracy of SNNs. Based on TQ-TTFS, we design a hardware architecture with a new inference scheme called Hybrid Priority Inference (HPI) which greatly reduces the frequency of weight access and supports temporal parallel computation. To further decrease storage overhead, we also introduce shared storage and membrane potential quantization. The proposed temporal quantization neuron model and hardware architecture demonstrate excellent performance. Our simulations show that TQ-TTFS achieves classification accuracy of 98.6% on the MNIST dataset, 90.2% on the FashionMNIST dataset, and 80.54% on the CIFAR-10 dataset, which are better than SOTA among temporal coded SNNs. Our FPGA implementation of the proposed hardware architecture has inference time of only 4.4 $\mu$s per image on the MNIST dataset and 24 $\mu$s per image on the FashionMNIST dataset. The energy consumption for these inferences is only 4 $\mu$J and 32 $\mu$J, respectively.