SPICED+: Syntactical Bug Pattern Identification and Correction of Trojans in A/MS Circuits Using LLM-Enhanced Detection

IF 2.8 2区 工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Jayeeta Chaudhuri;Dhruv Thapar;Arjun Chaudhuri;Farshad Firouzi;Krishnendu Chakrabarty
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引用次数: 0

Abstract

Analog and mixed-signal (A/MS) integrated circuits (ICs) are crucial in modern electronics, playing key roles in signal processing, amplification, sensing, and power management. Many IC companies outsource manufacturing to third-party foundries, creating security risks such as syntactical bugs and stealthy analog Trojans. Traditional Trojan detection methods, including embedding circuit watermarks and hardware-based monitoring, impose significant area and power overheads while failing to effectively identify and localize the Trojans. To overcome these shortcomings, we present SPICED+, a software-based framework designed for syntactical bug pattern identification and the correction of Trojans in A/MS circuits, leveraging large language model (LLM)-enhanced detection. It uses LLM-aided techniques to detect, localize, and iteratively correct analog Trojans in SPICE netlists, without requiring explicit model training, and thus incurs zero area overhead. The framework leverages chain-of-thought reasoning and few-shot learning to guide the LLMs in understanding and applying anomaly detection rules, enabling accurate identification and correction of Trojan-impacted nodes. With the proposed method, we achieve an average Trojan coverage of 93.3%, average Trojan correction rate of 91.2%, and an average false-positive rate of 1.4%.
模拟和混合信号(A/MS)集成电路(IC)在现代电子产品中至关重要,在信号处理、放大、传感和电源管理中发挥着关键作用。许多集成电路公司将制造外包给第三方代工厂,从而产生了语法错误和隐蔽模拟木马等安全风险。传统的木马检测方法,包括嵌入电路水印和基于硬件的监控,都会带来巨大的面积和功耗开销,同时无法有效识别和定位木马。为了克服这些缺点,我们提出了 SPICED+,这是一个基于软件的框架,旨在利用大语言模型(LLM)增强检测功能,识别语法错误模式并纠正 A/MS 电路中的木马。它使用 LLM 辅助技术来检测、定位和迭代修正 SPICE 网表中的模拟木马,而不需要显式模型训练,因此零面积开销。该框架利用思维链推理和少量学习来指导 LLMs 理解和应用异常检测规则,从而准确识别和纠正受木马影响的节点。利用所提出的方法,我们实现了平均 93.3% 的木马覆盖率、平均 91.2% 的木马纠正率和平均 1.4% 的假阳性率。
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来源期刊
CiteScore
6.40
自引率
7.10%
发文量
187
审稿时长
3.6 months
期刊介绍: The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.
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