An MIV Fault Diagnosis Method Based on Signal Transmission Performance Analysis

IF 2.8 2区工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Transactions on Very Large Scale Integration (VLSI) Systems Pub Date : 2024-12-27 DOI:10.1109/TVLSI.2024.3518554

Ziwen Xiao;Lifu Du;Zhiming Yang;Cuiyu Liu;Yang Yu

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引用次数: 0

Abstract

Monolithic inter-tier vias (MIVs) in monolithic 3-D integrated circuits (M3D ICs) enables massive vertical integration. However, MIVs are more susceptible to defects due to high integration density and complex manufacturing processes. Existing MIV test techniques can effectively detect and locate MIV faults, but diagnosable fault types are limited. We propose a novel fault diagnosis method based on signal transmission performance analysis. This method can diagnose more fault types, including resistive open, hard open, short, and leakage faults. In the proposed solution, fault diagnosis can be carried out by comprehensively monitoring voltage and delay characteristics of MIVs. The effectiveness of fault diagnosis is verified through high speed simulation program with integrated circuit emphasis (HSPICE) simulations. We also perform Monte Carlo simulations to prove that the proposed method has high robustness even in the case of process variations. Experimental results show that the proposed method has low hardware overhead while ensuring high diagnostic resolution.

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基于信号传输性能分析的MIV故障诊断方法

单片3-D集成电路（M3D ic）中的单片层间通孔（miv）实现了大规模的垂直集成。然而，由于集成密度高和制造工艺复杂，miv更容易出现缺陷。现有的MIV测试技术可以有效地检测和定位MIV故障，但可诊断的故障类型有限。提出了一种基于信号传输性能分析的故障诊断方法。该方法可以诊断更多的故障类型，包括电阻开、硬开、短路、漏电等故障。在该方案中，可以通过综合监测miv的电压和延迟特性来进行故障诊断。通过集成电路重点仿真（HSPICE）的高速仿真程序验证了故障诊断的有效性。我们还通过蒙特卡罗仿真证明了所提出的方法即使在过程变化的情况下也具有很高的鲁棒性。实验结果表明，该方法在保证高诊断分辨率的同时，具有较低的硬件开销。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 工程技术-工程：电子与电气

CiteScore

6.40

自引率

7.10%

发文量

187

审稿时长

3.6 months

期刊介绍： The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.